20 Jan
2020
20 Jan
'20
7:43 a.m.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37190 )
Change subject: soc/intel/common/cache_as_ram.S: Add macro to find a free MTRR ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37190/5/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/37190/5/src/soc/intel/common/block/... PS5, Line 31: * It should be checked agaist 0. 'agaist' may be misspelled - perhaps 'against'?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7d5442c75464cfb2b3611c63a472c8ee521c014d
Gerrit-Change-Number: 37190
Gerrit-PatchSet: 5
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Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com
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Gerrit-Comment-Date: Mon, 20 Jan 2020 15:43:16 +0000
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