[coreboot-gerrit] [S] Change in coreboot[master]: mb/siemens/mc_ehl2: Disable L1 prefetcher

[Mario Scheithauer (Code Review)]

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69966 )

Change subject: mb/siemens/mc_ehl2: Disable L1 prefetcher
......................................................................

mb/siemens/mc_ehl2: Disable L1 prefetcher

As for mainboard mc_ehl1, a hard real-time dependency is also required
for this mainboard. Therefore, the L1 prefetcher must also be disable
here.

For a more detailed description see also commit f61070e87c
(mb/siemens/mc_ehl1: Disable L1 prefetcher).

Change-Id: I07b27dd672533e693a6c2987d16f54333850760e
Signed-off-by: Mario Scheithauer 
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
1 file changed, 20 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/69966/1

diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index e1c2972..83d92cd 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -135,6 +135,9 @@
    	.vcc_low_high_us = 50,
    }"

+	# Disable L1 prefetcher
+	register "L1_prefetcher_disable" = "true"
+
    device domain 0 on
    	device pci 00.0 on	end # Host Bridge
    	device pci 02.0 on	end # Integrated Graphics Device