Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33116 )
Change subject: Kconfig: Make stage cache kconfig selection proper ......................................................................
Patch Set 19:
Patch Set 19:
Patch Set 18:
Patch Set 18:
I can add more description in commit msg, will wait for Furquan's further review before new patchset.
Btw, i don't understand if i need to wait for Oct'19 to merge this changes ?
Definetly not. I can accept a commit renaming 'RELOCATABLE_RAMSTAGE' immediately after 4.10 release. That is, if there is agreement we want to rename it at all due to predicted removal in near future (if POSTCAR_STAGE=y becomes criteria in 2019).
I have added required details to know about RELOCATABLE_RAMSTAGE renaming
As mentioned before, my idea is to untangle stage cache from relocatable ramstage. But that doesn't mean we have to get rid of RELOCATABLE_RAMSTAGE or its uses. Hence I commented on your patchset #17 -- "This equates STAGE_CACHE with RELOCATABLE_STAGES/RELOCATABLE_RAMSTAGE. Is that really a good assumption to make?" I think RELOCATABLE_RAMSTAGE could just live as it is right now. That is what I had collected in my comment:
" 1. Define configs for location of stage cache i.e. EXTERNAL_STAGE_CACHE and CBMEM_STAGE_CACHE which are dependent only on STAGE_CACHE config and are mutually exclusive.
2. Since stage cache support is a property of the platform, it doesn't have to be dependent on things like relocatable ramstage i.e. Platform can have stage cache support (internal / external) independent of other properties. Thus, add appropriate stage_cache files depending upon EXTERNAL_STAGE_CACHE/CBMEM_STAGE_CACHE to romstage, postcar and ramstage. (Basically any stage that exists).
3. Romstage and ramstage can add refcode and postcar to stage cache dependent on the selection of STAGE_CACHE. stage_cache_* APIs will take care of adding those to the right location. Probably we can get rid of the weak functions for stage_cache_*.
4. Romstage or Postcar (if present) will add ramstage to stage cache only if RELOCATABLE_RAMSTAGE is selected and STAGE_CACHE is enabled by the platform. Location of stage cache will be taken care of by stage_cache_* APIs.
5. Finally stage_cache implementation in FSP should be moved to intel/common/block/ since it has nothing to do with the FSP itself."