Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70111 )
Change subject: sb/intel: Use boolean for docking_supported ......................................................................
sb/intel: Use boolean for docking_supported
Change-Id: I1df5a0bd914c11993ce291939f68848bcce0c638 Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M src/mainboard/apple/macbookair4_2/devicetree.cb M src/mainboard/asrock/b75pro3-m/devicetree.cb M src/mainboard/compulab/intense_pc/devicetree.cb M src/mainboard/getac/p470/devicetree.cb M src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb M src/mainboard/hp/z220_series/devicetree.cb M src/mainboard/lenovo/l520/devicetree.cb M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t410/devicetree.cb M src/mainboard/lenovo/t430/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t530/devicetree.cb M src/mainboard/lenovo/t60/devicetree.cb M src/mainboard/lenovo/x201/devicetree.cb M src/mainboard/lenovo/x230/variants/x230/overridetree.cb M src/mainboard/lenovo/x60/devicetree.cb M src/mainboard/msi/ms7707/devicetree.cb M src/mainboard/roda/rk886ex/devicetree.cb M src/southbridge/intel/bd82x6x/chip.h M src/southbridge/intel/i82801gx/chip.h M util/autoport/main.go 22 files changed, 29 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/70111/1
diff --git a/src/mainboard/apple/macbookair4_2/devicetree.cb b/src/mainboard/apple/macbookair4_2/devicetree.cb index 6ea033e..beda6e6 100644 --- a/src/mainboard/apple/macbookair4_2/devicetree.cb +++ b/src/mainboard/apple/macbookair4_2/devicetree.cb @@ -25,7 +25,7 @@
device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "docking_supported" = "0" + register "docking_supported" = "false" register "gen1_dec" = "0x000c0681" register "gen2_dec" = "0x000c1641" register "gen3_dec" = "0x001c0301" diff --git a/src/mainboard/asrock/b75pro3-m/devicetree.cb b/src/mainboard/asrock/b75pro3-m/devicetree.cb index 0f7d0a8..78371bf 100644 --- a/src/mainboard/asrock/b75pro3-m/devicetree.cb +++ b/src/mainboard/asrock/b75pro3-m/devicetree.cb @@ -33,7 +33,7 @@ subsystemid 0x1849 0x0152 end chip southbridge/intel/bd82x6x - register "docking_supported" = "0" + register "docking_supported" = "false" register "gen1_dec" = "0x000c0291" register "gen2_dec" = "0x000c0241" register "gen3_dec" = "0x000c0251" diff --git a/src/mainboard/compulab/intense_pc/devicetree.cb b/src/mainboard/compulab/intense_pc/devicetree.cb index 6979615..af21a72 100644 --- a/src/mainboard/compulab/intense_pc/devicetree.cb +++ b/src/mainboard/compulab/intense_pc/devicetree.cb @@ -31,7 +31,7 @@
subsystemid 0x8086 0x7270 inherit chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "docking_supported" = "1" + register "docking_supported" = "true" register "gen1_dec" = "0x0000164d" register "gen2_dec" = "0x000c0681" register "gen3_dec" = "0x000406f1" diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index 9a91b81..fd551cb 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -45,7 +45,6 @@ register "ide_enable_secondary" = "0x0"
register "c3_latency" = "85" - register "docking_supported" = "1" register "p_cnt_throttling_supported" = "1"
register "gen1_dec" = "0x001c02e1" diff --git a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb index 98e48ef..3ea65e5 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb +++ b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb @@ -24,7 +24,7 @@ device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "docking_supported" = "0" + register "docking_supported" = "false" register "gen1_dec" = "0x00fc0601" register "gen2_dec" = "0x00fc0801" register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb index 7244acd..4084d8d 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb @@ -11,7 +11,7 @@ device pci 02.0 off end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH - register "docking_supported" = "0" + register "docking_supported" = "false" # mailbox at 0x200/0x201 and PM1 at 0x220 register "gen1_dec" = "0x007c0201" register "gen2_dec" = "0x000c0101" diff --git a/src/mainboard/hp/z220_series/devicetree.cb b/src/mainboard/hp/z220_series/devicetree.cb index bcacf71..d5f2f2e 100644 --- a/src/mainboard/hp/z220_series/devicetree.cb +++ b/src/mainboard/hp/z220_series/devicetree.cb @@ -25,7 +25,7 @@ device pci 06.0 off end # Extra x4 port on north bridge
chip southbridge/intel/bd82x6x # Intel Series 7 PCH - register "docking_supported" = "0" + register "docking_supported" = "false" register "gen1_dec" = "0x00fc0601" register "gen2_dec" = "0x00fc0801" register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" diff --git a/src/mainboard/lenovo/l520/devicetree.cb b/src/mainboard/lenovo/l520/devicetree.cb index 6c2dabe..88adf5b 100644 --- a/src/mainboard/lenovo/l520/devicetree.cb +++ b/src/mainboard/lenovo/l520/devicetree.cb @@ -30,7 +30,7 @@ device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "docking_supported" = "1" + register "docking_supported" = "true" register "gen1_dec" = "0x007c1611" register "gen2_dec" = "0x00040069" register "gen3_dec" = "0x000c0701" diff --git a/src/mainboard/lenovo/s230u/devicetree.cb b/src/mainboard/lenovo/s230u/devicetree.cb index f7d65ca..dda8393 100644 --- a/src/mainboard/lenovo/s230u/devicetree.cb +++ b/src/mainboard/lenovo/s230u/devicetree.cb @@ -28,7 +28,7 @@ device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "docking_supported" = "1" + register "docking_supported" = "true" register "gen1_dec" = "0x00000000" register "gen2_dec" = "0x000c0701" register "gen3_dec" = "0x000c0069" diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb index 200cabb..6bd90fb 100644 --- a/src/mainboard/lenovo/t410/devicetree.cb +++ b/src/mainboard/lenovo/t410/devicetree.cb @@ -48,7 +48,7 @@ register "gen3_dec" = "0x1c1681" # EC ? register "gen4_dec" = "0x040069" # ?
- register "docking_supported" = "1" + register "docking_supported" = "true"
register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
diff --git a/src/mainboard/lenovo/t430/devicetree.cb b/src/mainboard/lenovo/t430/devicetree.cb index 141faa9..7931284 100644 --- a/src/mainboard/lenovo/t430/devicetree.cb +++ b/src/mainboard/lenovo/t430/devicetree.cb @@ -28,7 +28,7 @@ subsystemid 0x17aa 0x21f3 inherit
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "docking_supported" = "1" + register "docking_supported" = "true" register "gen1_dec" = "0x000c15e1" register "gen2_dec" = "0x007c1601" register "gen3_dec" = "0x000c06a1" diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index 739d01d..b3635b1 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -59,7 +59,7 @@
# Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "true" - register "docking_supported" = "1" + register "docking_supported" = "true"
register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb index 5cfa207..afbd3ba 100644 --- a/src/mainboard/lenovo/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/devicetree.cb @@ -60,7 +60,7 @@ register "superspeed_capable_ports" = "0xf" register "xhci_overcurrent_mapping" = "0x04000201"
- register "docking_supported" = "1" + register "docking_supported" = "true"
register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index 7709a87..dd24736 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -63,7 +63,6 @@
register "c4onc3_enable" = "1" register "c3_latency" = "0x23" - register "docking_supported" = "1" register "p_cnt_throttling_supported" = "1"
register "gen1_dec" = "0x007c1601" diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index fc7c470..e9f60b0 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -48,7 +48,7 @@ register "gen3_dec" = "0x1c1681" register "gen4_dec" = "0x040069"
- register "docking_supported" = "1" + register "docking_supported" = "true"
register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
diff --git a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb index 978d017..06b905e 100644 --- a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb @@ -1,7 +1,7 @@ chip northbridge/intel/sandybridge device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH - register "docking_supported" = "1" + register "docking_supported" = "true" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" device pci 1c.2 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 8620062..f42b628 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -57,7 +57,6 @@ register "c4onc3_enable" = "1"
register "c3_latency" = "0x23" - register "docking_supported" = "1" register "p_cnt_throttling_supported" = "1"
register "gen1_dec" = "0x007c1601" diff --git a/src/mainboard/msi/ms7707/devicetree.cb b/src/mainboard/msi/ms7707/devicetree.cb index 8e5df58..d8590a8 100644 --- a/src/mainboard/msi/ms7707/devicetree.cb +++ b/src/mainboard/msi/ms7707/devicetree.cb @@ -16,7 +16,7 @@ device pci 02.0 off end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "docking_supported" = "0" + register "docking_supported" = "false" register "gen1_dec" = "0x000c0291" register "gen2_dec" = "0x000c0a01" register "pcie_port_coalesce" = "true" diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index 6b9dbd9..978fb04 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -40,7 +40,6 @@ register "gpe0_en" = "0x20800007"
register "c3_latency" = "0x23" - register "docking_supported" = "1" register "p_cnt_throttling_supported" = "1"
register "sata_mode" = "SATA_MODE_IDE_LEGACY_COMBINED" diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h index 30c2675..6aa18c4 100644 --- a/src/southbridge/intel/bd82x6x/chip.h +++ b/src/southbridge/intel/bd82x6x/chip.h @@ -63,7 +63,7 @@ /* Override PCIe ASPM */ uint8_t pcie_aspm[8];
- int docking_supported; + bool docking_supported;
uint8_t pcie_hotplug_map[8];
diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h index 09a7126..02da70a 100644 --- a/src/southbridge/intel/i82801gx/chip.h +++ b/src/southbridge/intel/i82801gx/chip.h @@ -64,7 +64,7 @@ bool pcie_port_coalesce;
int c4onc3_enable:1; - int docking_supported:1; + bool docking_supported:true; int p_cnt_throttling_supported:1; int c3_latency;
diff --git a/util/autoport/main.go b/util/autoport/main.go index 9b0b436..254c464 100644 --- a/util/autoport/main.go +++ b/util/autoport/main.go @@ -137,9 +137,9 @@
func FormatBool(inp bool) string { if inp { - return "1" + return "true" } else { - return "0" + return "false" } }