[coreboot-gerrit] Change in coreboot[master]: arch/x86: Top align the bootblock

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47194 )

Change subject: arch/x86: Top align the bootblock
......................................................................

arch/x86: Top align the bootblock

This removes the fixed C_ENV_BOOTBLOCK requirement for X86 systems.

Change-Id: Ibd22ab394a38e73ba365b0796419b69e4bc0b45f
Signed-off-by: Arthur Heymans 
---
M src/arch/x86/car.ld
M src/arch/x86/memlayout.ld
M src/cpu/x86/16bit/reset16.ld
3 files changed, 18 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/47194/1

diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index eabe873..cbd5ceb 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -94,7 +94,7 @@
 _car_mtrr_mask = ~(MAX(4096, _car_mtrr_sz_log2) - 1);

#if !CONFIG(NO_XIP_EARLY_STAGES)
-_xip_program_sz_log2 = 1 << LOG2CEIL(_ebootblock - _bootblock);
+_xip_program_sz_log2 = 1 << LOG2CEIL(0x100000000 - _program);
 _xip_mtrr_mask = ~(MAX(4096, _xip_program_sz_log2) - 1);
 #endif

diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
index 3659cc9..c592a82 100644
--- a/src/arch/x86/memlayout.ld
+++ b/src/arch/x86/memlayout.ld
@@ -28,9 +28,6 @@

#include "car.ld"
 #elif ENV_BOOTBLOCK
-	BOOTBLOCK(CONFIG_X86_RESET_VECTOR - CONFIG_C_ENV_BOOTBLOCK_SIZE + 0x10,
-			CONFIG_C_ENV_BOOTBLOCK_SIZE)
-
    #include "car.ld"

#elif ENV_POSTCAR
diff --git a/src/cpu/x86/16bit/reset16.ld b/src/cpu/x86/16bit/reset16.ld
index 97e70b9..755234a 100644
--- a/src/cpu/x86/16bit/reset16.ld
+++ b/src/cpu/x86/16bit/reset16.ld
@@ -12,6 +12,18 @@
    _TOO_LOW = CONFIG_X86_RESET_VECTOR - 0xfff0;
    _bogus = ASSERT(_start16bit >= _TOO_LOW, "_start16bit too low. Please report.");

+	.bogus PROGRAM_START : {
+		. = ALIGN(4);
+	}
+
+	INCLUDE "bootblock/lib/program.ld"
+
+	/*
+	 * Allocation reserves extra 16 bytes here. Alignment requirements
+	 * may cause the total size of a section to change when the start
+	 * address gets applied.
+	 */
+
    .bogus ROMLOC_MIN : {
    	. = ALIGN(4);
    }
@@ -32,8 +44,13 @@
 }

EARLYASM_SIZE = (_erealmode - _realmode);
+PROGRAM_SIZE = (_eprogram - _program);
 /* Assume that 0xf0 below the reset vector (size 0x10), so 0x100 in total is
  * not available for code.
  */
 ROMLOC_MIN = ALIGN_DOWN(CONFIG_X86_RESET_VECTOR - RESERVED_BELOW_RESET - EARLYASM_SIZE, \
    REALMODE_ALIGNMENT);
+/* With Intel CbNT or Bootguard the IBB alignment needs to be 64 bytes.
+ * Not much is lost to do this for all systems.
+ */
+PROGRAM_START = ALIGN_DOWN(ROMLOC_MIN - PROGRAM_SIZE, 64);