[coreboot-gerrit] [S] Change in coreboot[master]: intel/i945: Use 'bool' for dual_channel and interleaved

[Martin Roth (Code Review)]

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67925 )

Change subject: intel/i945: Use 'bool' for dual_channel and interleaved
......................................................................

intel/i945: Use 'bool' for dual_channel and interleaved

Signed-off-by: Elyes Haouas 
Change-Id: I055847c9b08795683fe2e1dfd7fcde49901fc973
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67925
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/northbridge/intel/i945/raminit.c
M src/northbridge/intel/i945/raminit.h
2 files changed, 26 insertions(+), 10 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 2ab4d10..c9b0837 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -314,10 +314,10 @@

printk(BIOS_DEBUG, "This mainboard supports ");
    if (sdram_capabilities_dual_channel()) {
-		sysinfo->dual_channel = 1;
+		sysinfo->dual_channel = true;
    	printk(BIOS_DEBUG, "Dual Channel Operation.\n");
    } else {
-		sysinfo->dual_channel = 0;
+		sysinfo->dual_channel = false;
    	printk(BIOS_DEBUG, "only Single Channel Operation.\n");
    }

@@ -765,7 +765,7 @@
    DQ2330, NC,      CTL3215, NC,      CLK2030, CLK2030, DQ2030, CMD3210
 };

-static const u32 *slew_group_lookup(int dual_channel, int index)
+static const u32 *slew_group_lookup(bool dual_channel, int index)
 {
    const u8 *slew_group;
    /* Dual Channel needs different tables. */
@@ -902,7 +902,8 @@
 static void sdram_rcomp_buffer_strength_and_slew(struct sys_info *sysinfo)
 {
    const u8 *strength_multiplier;
-	int idx, dual_channel;
+	int idx;
+	bool dual_channel;

/* Set Strength Multipliers */

@@ -910,12 +911,12 @@
    if (sdram_capabilities_dual_channel()) {
    	printk(BIOS_DEBUG, "Programming Dual Channel RCOMP\n");
    	strength_multiplier = dual_channel_strength_multiplier;
-		dual_channel = 1;
+		dual_channel = true;
    	idx = 5 * sysinfo->dimm[0] + sysinfo->dimm[2];
    } else {
    	printk(BIOS_DEBUG, "Programming Single Channel RCOMP\n");
    	strength_multiplier = single_channel_strength_multiplier;
-		dual_channel = 0;
+		dual_channel = false;
    	idx = 5 * sysinfo->dimm[0] + sysinfo->dimm[1];
    }

@@ -1536,9 +1537,9 @@
         (sysinfo->banksize[4] + sysinfo->banksize[5] +
          sysinfo->banksize[6] + sysinfo->banksize[7]))) {
    	/* Both channels equipped with DIMMs of the same size */
-		sysinfo->interleaved = 1;
+		sysinfo->interleaved = true;
    } else {
-		sysinfo->interleaved = 0;
+		sysinfo->interleaved = false;
    }

reg32 = mchbar_read32(DCC);
diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h
index 513984f..d69110e 100644
--- a/src/northbridge/intel/i945/raminit.h
+++ b/src/northbridge/intel/i945/raminit.h
@@ -3,6 +3,8 @@
 #ifndef RAMINIT_H
 #define RAMINIT_H

+#include <types.h>
+
 #define DIMM_SOCKETS 2

#define DIMM_TCO_BASE 0x30
@@ -24,8 +26,8 @@
    u8 cas;			/* 3, 4 or 5 */
    u8 refresh;		/* 0 = 15.6us, 1 = 7.8us */

-	u8 dual_channel;	/* 0 or 1 */
-	u8 interleaved;
+	bool dual_channel;
+	bool interleaved;

u8 mvco4x;		/* 0 (8x) or 1 (4x) */
    u8 clkcfg_bit7;