[coreboot-gerrit] Change in coreboot[master]: mainboard/google/volteer: Disable S0i3.4 if cr50 firmware is too old

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44359 )

Change subject: mainboard/google/volteer: Disable S0i3.4 if cr50 firmware is too old
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Patch Set 19: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/44359/19//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44359/19//COMMIT_MSG@29 
PS19, Line 29:  But it is entirely possible that
             : we have just been "lucky" that the SoC has not gone into low power
             : mode during the boot process, where most of the cr50 communication
             : happens.
FYI, it's not necessarily luck, but likely the fact that most of the Cr50 communication happens in verstage, whereas the GPIO PM doesn't get enabled until FSP-S runs in ramstage.