build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44719 )
Change subject: soc/mediatek/mt8192: Do dramc rx window training ......................................................................
Patch Set 1:
(7 comments)
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... PS1, Line 1771: { that open brace { should be on the previous line
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... PS1, Line 1784: static void rddqc_pinmux_set(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... PS1, Line 1813: static void dramc_rx_rddqc_init(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... PS1, Line 1846: void dramc_rx_window_perbit_cal(const struct ddr_cali* cali, rx_cali_type cali_type) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... PS1, Line 1934: SHU_R0_B0_RXDLY0_RX_ARDQ1_R_DLY_B0, final_win_perbit[bit + 1].best_dqdly); line over 96 characters
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... PS1, Line 1937: SHU_R0_B1_RXDLY0_RX_ARDQ0_R_DLY_B1, final_win_perbit[bit + 8].best_dqdly, line over 96 characters
https://review.coreboot.org/c/coreboot/+/44719/1/src/soc/mediatek/mt8192/dra... PS1, Line 1938: SHU_R0_B1_RXDLY0_RX_ARDQ1_R_DLY_B1, final_win_perbit[bit + 9].best_dqdly); line over 96 characters