Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51672 )
Change subject: purism/librem_14: add on-board LAN device ......................................................................
purism/librem_14: add on-board LAN device
On-board devices should be present in the devicetree, so that `.on_mainboard` field of `struct device` is `1`.
Signed-off-by: Michael Niewöhner foss@mniewoehner.de Change-Id: I3678514482724377bcdfcbdc7f2c5b312a48b2c6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51672 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb 1 file changed, 2 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb index dc89bd4..375aa5d 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb @@ -229,7 +229,8 @@ register "PcieClkSrcClkReq[2]" = "2" smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230" "SlotDataBusWidth1X" end - device pci 1c.7 on # PCI Express Port 8 -- x1 (LAN) + device pci 1c.7 on # PCI Express Port 8 + device pci 00.0 on end # x1 (LAN) register "PcieRpEnable[7]" = "1" register "PcieClkSrcUsage[3]" = "7" register "PcieClkSrcClkReq[3]" = "3"