Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47559 )
Change subject: intel/fsp2_0: Add soc_validate_fsp_version for FSP version check
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Patch Set 3: Code-Review+1
This looks good to me.
I had a discussion with Nate. As a summary:
* The practice of using 2 bits in bld_num for year, 5 bits in bld_num for work week, aligns with client FSP practice.
* Intead of bld_num, revision should be used to indicated FSP UPD header compatibility. So far revision field has not been maintained for CPX-SP FSP, this however will be addressed by Intel CPX-SP FSP team. When that happens, we will update coreboot code to check revision field to make sure coreboot code is compatible with FSP binary in terms of UPD header.
* For HOBs, the GUID should be updated when there is structure change. So far the HOB GUIDs are not maintained for CPX-SP FSP, this will be addressed by Intel CPX-SP FSP team.
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