[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Always use `CHIPSET_LOCKDOWN_COREBOOT`

[Angel Pons (Code Review)]

Attention is currently required from: Patrick Rudolph.
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52096 )

Change subject: soc/intel/skylake: Always use `CHIPSET_LOCKDOWN_COREBOOT`
......................................................................

soc/intel/skylake: Always use `CHIPSET_LOCKDOWN_COREBOOT`

FSP lockdown is not documented and could change after a FSP update, yet
it is somehow the default choice if the devicetree does not specify any
value for `common_soc_config.chipset_lockdown` Update the devicetree in
early ramstage to always use `CHIPSET_LOCKDOWN_COREBOOT`, bypassing the
mainboards' devicetree choice. Since all Skylake mainboards already use
`CHIPSET_LOCKDOWN_COREBOOT`, this change is a no-op.

Change-Id: I24a1a2fab166aa3bfe8e0b07f155f57f2bf745e3
Signed-off-by: Angel Pons 
---
M src/soc/intel/skylake/chip.c
1 file changed, 10 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/52096/1

diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 0ae98a9..2a7c02a 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <bootsplash.h>
+#include <bootstate.h>
 #include <cbmem.h>
 #include <fsp/api.h>
 #include <acpi/acpi.h>
@@ -220,6 +221,15 @@
    .init		= &soc_init_pre_device,
 };

+/* Update devicetree in earliest ramstage to always use CHIPSET_LOCKDOWN_COREBOOT */
+static void override_lockdown_config(void *unused)
+{
+	struct soc_intel_skylake_config *config = config_of_soc();
+	config->common_soc_config.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT;
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, override_lockdown_config, NULL);
+
 /* UPD parameters to be initialized before SiliconInit */
 void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 {