[coreboot-gerrit] Change in coreboot[master]: soc/intel/skl/acpi: add description for missing PCIe ports

[Maxim Polyakov (Code Review)]

Hello Patrick Rudolph, Angel Pons, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35072

to look at the new patch set (#8).

Change subject: soc/intel/skl/acpi: add description for missing PCIe ports
......................................................................

soc/intel/skl/acpi: add description for missing PCIe ports

According to the documentation, Sunrise PCH-H [1,2] and Lewisburg PCH
[3] supports up to 16 PCIe ports. However, ACPI contains a description
for only 12 ports. This patch adds ACPI code for missing ports

[1] page 182, Intel (R) 100 Series and Intel (R) C230 Series PCH
    Family Platform Controller Hub (PCH), Datasheet, Vol 1 of 2,
    December 2018, Document Number: 332690-005EN

[2] page 180, Intel (R) 200 Series and Intel (R) Z370 Series PCH
    Family Platform Controller Hub (PCH), Datasheet, Vol 1 of 2,
    October 2017, Document Number: 335192-003

[3] page 39, Intel(R) C620 Series Chipset Platform Controller Hub
    (PCH) Datasheet, May 2019. Document Number: 336067-007US

Change-Id: I954870136e0c8e5ff5d7ff623c7a6432b829abaf
Signed-off-by: Maxim Polyakov 
---
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/acpi/pcie.asl
2 files changed, 76 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/35072/8