Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41935
to look at the new patch set (#9).
Change subject: southbridge/intel/wildcatpoint: Add ACPI ......................................................................
southbridge/intel/wildcatpoint: Add ACPI
Move ACPI ASL files from the soc namespace to the southbridge scope. We also need to update the mainboard-scope dsdt.asl inclusion paths.
With BUILD_TIMELESS=1 but without adding the .config file into the resulting coreboot image, google/auron (Buddy) remains identical.
Change-Id: I28e4d437728815a4038d7e1610e12a983c578742 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/auron/dsdt.asl M src/mainboard/google/jecht/dsdt.asl M src/mainboard/intel/wtm2/dsdt.asl M src/mainboard/purism/librem_bdw/dsdt.asl R src/southbridge/intel/wildcatpoint/acpi/adsp.asl R src/southbridge/intel/wildcatpoint/acpi/device_nvs.asl R src/southbridge/intel/wildcatpoint/acpi/ehci.asl R src/southbridge/intel/wildcatpoint/acpi/globalnvs.asl R src/southbridge/intel/wildcatpoint/acpi/gpio.asl R src/southbridge/intel/wildcatpoint/acpi/hda.asl R src/southbridge/intel/wildcatpoint/acpi/irqlinks.asl R src/southbridge/intel/wildcatpoint/acpi/lpc.asl R src/southbridge/intel/wildcatpoint/acpi/pch.asl R src/southbridge/intel/wildcatpoint/acpi/pcie.asl R src/southbridge/intel/wildcatpoint/acpi/pcie_port.asl R src/southbridge/intel/wildcatpoint/acpi/platform.asl R src/southbridge/intel/wildcatpoint/acpi/sata.asl R src/southbridge/intel/wildcatpoint/acpi/serialio.asl R src/southbridge/intel/wildcatpoint/acpi/smbus.asl R src/southbridge/intel/wildcatpoint/acpi/xhci.asl 20 files changed, 10 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/41935/9