Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40291 )
Change subject: vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profiles ......................................................................
Patch Set 11:
Cause of my earlier problem: although the SPD Buffer is 256 bytes in AGESA's vendorcode, the smbus_readSpd function only read the first 128 bytes: so at SPD Buffer's XMP profile offset there was a bunch of 00 instead of real values. I didn't notice it at first, but this instantly became clear after a full print of read SPD Buffer. After I changed that to 256, now the XMP 1 "1866MHz" profile is giving me 1600MHz speed - which of course is better than turtle 1333MHz, but now I need to figure out: what else is blocking a 1866MHz? Maybe a northbridge frequency? Also, started working on a custom SPD values set up as you see, although it's a lower priority.