Attention is currently required from: Patrick Rudolph, Subrata Banik, Andrey Petrov.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49899 )
Change subject: soc/intel/*: Update microcode as specified for MP-init
......................................................................
Patch Set 13:
(1 comment)
File src/soc/intel/skylake/cpu.c:
https://review.coreboot.org/c/coreboot/+/49899/comment/29201021_1539eebb
PS5, Line 101: /* Configure Core PRMRR for SGX. */
: if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
: prmrr_core_configure();
:
: /*
: * Update microcode a second time as part of MP-init after SMM has been relocated.
: * Must happen before MCEs are cleared, but after PRMRR have been set.
: */
: const void *microcode_patch = intel_microcode_find_cached();
: intel_microcode_load_unlocked(microcode_patch);
I like the idea to move MP init code to a common location, this should however happen in a separate […]
Uhm, why move it out of common code and move it back later when you can just correct common code?
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