[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Clean up `dram_mr2` function

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47569 )

Change subject: nb/intel/sandybridge: Clean up `dram_mr2` function
......................................................................

nb/intel/sandybridge: Clean up `dram_mr2` function

Constify variables, and also remove pointless and-masks on mr2reg.

Tested on Asus P8H61-M PRO, still boots.

Change-Id: I3829012ff7d41f4308ee84d6fbf3b1f2803431af
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47569
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 9 insertions(+), 12 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 453222e..3ed1a3a 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -757,22 +757,19 @@

static void dram_mr2(ramctr_timing *ctrl, u8 rank, int channel)
 {
-	u16 pasr, cwl, mr2reg;
-	odtmap odt;
+	const u16 pasr = 0;
+	const u16 cwl = ctrl->CWL - 5;
+	const odtmap odt = get_ODT(ctrl, channel);
+
    int srt = 0;
-
-	pasr = 0;
-	cwl = ctrl->CWL - 5;
-	odt = get_ODT(ctrl, channel);
-
    if (IS_IVY_CPU(ctrl->cpu) && ctrl->tCK >= TCK_1066MHZ)
    	srt = ctrl->extended_temperature_range && !ctrl->auto_self_refresh;

-	mr2reg = 0;
-	mr2reg = (mr2reg & ~0x07) | pasr;
-	mr2reg = (mr2reg & ~0x38) | (cwl << 3);
-	mr2reg = (mr2reg & ~0x40) | (ctrl->auto_self_refresh << 6);
-	mr2reg = (mr2reg & ~0x80) | (srt << 7);
+	u16 mr2reg = 0;
+	mr2reg |= pasr;
+	mr2reg |= cwl << 3;
+	mr2reg |= ctrl->auto_self_refresh << 6;
+	mr2reg |= srt << 7;
    mr2reg |= (odt.rttwr / 60) << 9;

write_mrreg(ctrl, channel, rank, 2, mr2reg);