Gabe Black (gabeblack@chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3746
-gerrit
commit 9fec4720f348802cac9493b2704bdeca2c9f5c01 Author: Bill Richardson wfrichar@chromium.org Date: Wed Jun 12 10:50:41 2013 -0700
ec: Reserve correct ioport regions for Chrome OS EC to use
The LPC-based ChromeOS EC uses several ioport regions to communicate with the AP. In order for the new unified userspace access method to work, we need them to be reserved by the BIOS.
Before /proc/ioports shows:
0800-0803 0804-08ff
We'd like just a single 256-byte region at 0x800, but ASL can't handle that. So this will work:
0800-087f 0880-08ff
Change-Id: I3f8060bff32d3a49f1488b26830ae26b83dab79d Signed-off-by: Bill Richardson wfrichar@chromium.org --- src/ec/google/chromeec/acpi/superio.asl | 17 +++++------ src/ec/google/chromeec/ec_commands.h | 51 +++++++++++++++++++++++++++------ 2 files changed, 52 insertions(+), 16 deletions(-)
diff --git a/src/ec/google/chromeec/acpi/superio.asl b/src/ec/google/chromeec/acpi/superio.asl index 4f71332..39ddd29 100644 --- a/src/ec/google/chromeec/acpi/superio.asl +++ b/src/ec/google/chromeec/acpi/superio.asl @@ -29,8 +29,9 @@ * SIO_EC_HOST_ENABLE : Enable EC host command interface resources * EC_LPC_ADDR_HOST_DATA : EC host command interface data port * EC_LPC_ADDR_HOST_CMD : EC host command interface command port - * EC_LPC_ADDR_HOST_ARGS : EC host command arguments - * EC_LPC_ADDR_HOST_PARAM : EC host command parameter buffer + * EC_HOST_CMD_REGION0 : EC host command buffer + * EC_HOST_CMD_REGION1 : EC host command buffer + * EC_HOST_CMD_REGION_SIZE : EC host command buffer size */
// Scope is _SB.PCI0.LPCB @@ -75,9 +76,8 @@ Device (SIO) { { FixedIO (EC_LPC_ADDR_HOST_DATA, 1) FixedIO (EC_LPC_ADDR_HOST_CMD, 1) - FixedIO (EC_LPC_ADDR_HOST_ARGS, 4) - FixedIO (EC_LPC_ADDR_HOST_PARAM, - EC_HOST_PARAM_SIZE) + FixedIO (EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION_SIZE) + FixedIO (EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION_SIZE) })
Name (_PRS, ResourceTemplate () @@ -85,9 +85,10 @@ Device (SIO) { StartDependentFn (0, 0) { FixedIO (EC_LPC_ADDR_HOST_DATA, 1) FixedIO (EC_LPC_ADDR_HOST_CMD, 1) - FixedIO (EC_LPC_ADDR_HOST_ARGS, 4) - FixedIO (EC_LPC_ADDR_HOST_PARAM, - EC_HOST_PARAM_SIZE) + FixedIO (EC_HOST_CMD_REGION0, + EC_HOST_CMD_REGION_SIZE) + FixedIO (EC_HOST_CMD_REGION1, + EC_HOST_CMD_REGION_SIZE) } EndDependentFn () }) diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 93258df..a2cc70c 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -42,10 +42,16 @@ #define EC_LPC_ADDR_HOST_CMD 0x204
/* I/O addresses for host command args and params */ -#define EC_LPC_ADDR_HOST_ARGS 0x800 +#define EC_LPC_ADDR_HOST_ARGS 0x800 /* and 0x801, 0x802, 0x803 */ #define EC_LPC_ADDR_HOST_PARAM 0x804 #define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */
+/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff + * and they tell the kernel that so we have to think of it as two parts. */ +#define EC_HOST_CMD_REGION0 0x800 +#define EC_HOST_CMD_REGION1 0x880 +#define EC_HOST_CMD_REGION_SIZE 0x80 + /* EC command register bit functions */ #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ @@ -726,15 +732,44 @@ enum lightbar_command { /*****************************************************************************/ /* LED control commands */
-#define EC_CMD_LED_SET 0x29 +#define EC_CMD_LED_CONTROL 0x29
-#define EC_LED_FLAGS_AUTO (1 << 1) +enum ec_led_id { + EC_LED_ID_BATTERY_LED = 0, + EC_LED_ID_POWER_BUTTON_LED, + EC_LED_ID_ADAPTER_LED, +};
-struct ec_params_led_set { - uint8_t r; - uint8_t g; - uint8_t b; /* Used as yellow if there is no blue LED */ - uint8_t flags; +/* LED control flags */ +#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */ +#define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */ + +enum ec_led_colors { + EC_LED_COLOR_RED = 0, + EC_LED_COLOR_GREEN, + EC_LED_COLOR_BLUE, + EC_LED_COLOR_YELLOW, + EC_LED_COLOR_WHITE, + + EC_LED_COLOR_COUNT +}; + +struct ec_params_led_control { + uint8_t led_id; /* Which LED to control */ + uint8_t flags; /* Control flags */ + + uint8_t brightness[EC_LED_COLOR_COUNT]; +} __packed; + +struct ec_response_led_control { + /* + * Available brightness value range. + * + * Range 0 means color channel not present. + * Range 1 means on/off control. + * Other values means the LED is control by PWM. + */ + uint8_t brightness_range[EC_LED_COLOR_COUNT]; } __packed;
/*****************************************************************************/