Attention is currently required from: Eran Mitrani, Kapil Porwal, Subrata Banik, Tarun.
Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78245?usp=email )
Change subject: soc/intel/mtl: Display Sign-of-Life message during CSME update ......................................................................
soc/intel/mtl: Display Sign-of-Life message during CSME update
BUF=b:279173035 TEST=Text message is displayed during CSME update on rex
Change-Id: I19808bae1bbedcdca1a8360e6d3b7d237800dc47 Signed-off-by: Jeremy Compostella jeremy.compostella@intel.com --- M src/soc/intel/meteorlake/romstage/fsp_params.c 1 file changed, 12 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/78245/1
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 8979a18..00efc51 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -11,6 +11,7 @@ #include <fsp/util.h> #include <intelbasecode/ramtop.h> #include <intelblocks/cpulib.h> +#include <intelblocks/cse.h> #include <intelblocks/pcie_rp.h> #include <option.h> #include <soc/gpio_soc_defs.h> @@ -396,12 +397,20 @@ { size_t vbt_size; static char vbt[CONFIG_VBT_DATA_SIZE_KB * KiB]; + uint32_t vga_init_control = 0;
if (!CONFIG(SOC_INTEL_METEORLAKE_SIGN_OF_LIFE)) return;
- /* No memory training. */ - if (arch_upd->NvsBufferPtr) + /* Memory training. */ + if (!arch_upd->NvsBufferPtr) + vga_init_control = VGA_INIT_CONTROL_ENABLE \ + | VGA_INIT_CONTROL_TEAR_DOWN; + + if (is_cse_fw_update_required()) + vga_init_control = VGA_INIT_CONTROL_ENABLE; + + if (!vga_init_control) return;
const char *text = ux_locales_get_text(UX_MEMORY_TRAINING_DESC); @@ -417,8 +426,7 @@ return; }
- m_cfg->VgaInitControl = VGA_INIT_CONTROL_ENABLE \ - | VGA_INIT_CONTROL_TEAR_DOWN; + m_cfg->VgaInitControl = vga_init_control; m_cfg->VbtPtr = (UINT32)vbt; m_cfg->VbtSize = vbt_size; m_cfg->LidStatus = 1;