Duncan Laurie has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41893 )
Change subject: soc/intel/common/block: Add new block DTT ......................................................................
soc/intel/common/block: Add new block DTT
Intel Dynamic Tuning Technology is the name of a PCI device on some Intel SoCs. This minimal PCI driver is only used now for SSDT generation on TGL devices.
Change-Id: Ib52f35e4e020ca3e6ab8b32cc3bf7df36041926e Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/41893 Reviewed-by: Nick Vaccaro nvaccaro@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h A src/soc/intel/common/block/dtt/Kconfig A src/soc/intel/common/block/dtt/Makefile.inc A src/soc/intel/common/block/dtt/dtt.c M src/soc/intel/tigerlake/Kconfig 5 files changed, 35 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index ed0629a..8d16361 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3717,6 +3717,9 @@ #define PCI_DEVICE_ID_INTEL_TGL_IPU 0x9a19 #define PCI_DEVICE_ID_INTEL_JSL_IPU 0x4e19
+/* Intel Dynamic Tuning Technology Device */ +#define PCI_DEVICE_ID_INTEL_TGL_DTT 0x9A03 + #define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 #define PCI_DEVICE_ID_COMPUTONE_PG 0x0302 diff --git a/src/soc/intel/common/block/dtt/Kconfig b/src/soc/intel/common/block/dtt/Kconfig new file mode 100644 index 0000000..063c475 --- /dev/null +++ b/src/soc/intel/common/block/dtt/Kconfig @@ -0,0 +1,7 @@ +config SOC_INTEL_COMMON_BLOCK_DTT + bool + default n + help + Minimal PCI Driver for enabling SSDT generation of Intel + Dynamic Tuning Technology (DTT) policies and controls, also + known as Intel DPTF (Dynamic Platform and Thermal Framework) diff --git a/src/soc/intel/common/block/dtt/Makefile.inc b/src/soc/intel/common/block/dtt/Makefile.inc new file mode 100644 index 0000000..08f48c9 --- /dev/null +++ b/src/soc/intel/common/block/dtt/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_DTT) += dtt.c diff --git a/src/soc/intel/common/block/dtt/dtt.c b/src/soc/intel/common/block/dtt/dtt.c new file mode 100644 index 0000000..14987ea --- /dev/null +++ b/src/soc/intel/common/block/dtt/dtt.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_INTEL_TGL_DTT, +}; + +static struct device_operations dptf_dev_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_generic_bus, + .ops_pci = &pci_dev_ops_pci, +}; + +static const struct pci_driver pch_dptf __pci_driver = { + .ops = &dptf_dev_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +}; diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index c30519c..091abb9 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -45,6 +45,7 @@ select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CPU select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT + select SOC_INTEL_COMMON_BLOCK_DTT select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 select SOC_INTEL_COMMON_BLOCK_HDA