Aaron Durbin (adurbin@chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11503
-gerrit
commit d9cc948e59f2f2aa55b8e0c2e4d0646da37335b3 Author: Aaron Durbin adurbin@chromium.org Date: Thu Sep 3 11:01:17 2015 -0500
x86: don't create MAINBOARDDIR/romstage.inc for !ROMCC boards
Previously, the x86 romstage build process was unconditionally creating a romstage.inc and adding it to crt0s. This step is inherently not necessary in the !ROMCC case becaue the romstage.inc was created by the compiler outputting assembler. That means MAINBOARDDIR/romstage.c is truly a C environment that requires some sort of assembler stub to call into (cache_as_ram.inc from the chipset dirs). Therefore, remove this processing. The result is that MAINBOARDDIR/romstage.c can use the normal build steps in creating an object and linking. The layout of romstage.elf will change but that's only from a symbol perspective.
BUG=chrome-os-partner:44827 BRANCH=None TEST=Built multitude of boards. Compared readelf -e output.
Change-Id: I9b8079caaaa55e3ae20d3db4c9b8be04cdc41ab7 Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/arch/x86/Makefile.inc | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 94d104d..7f2a3a2 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -121,13 +121,19 @@ endif
crt0s += $(cpu_incs-y)
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc +ifneq ($(CONFIG_ROMCC),y) + +romstage-srcs += $(src)/mainboard/$(MAINBOARDDIR)/romstage.c
-ifeq ($(CONFIG_ROMCC),y) +else # CONFIG_ROMCC == y + +# This order matters. The mainboards requiring ROMCC need their mainboard +# code to follow the prior crt0s files for program flow control. The +# romstage.inc from the MAINBOARDDIR is implicitly main() for romstage +# because of the instruction sequen fall-through. +crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc crt0s += $(src)/arch/x86/crt0_romcc_epilogue.inc -endif
-ifeq ($(CONFIG_ROMCC),y) ifeq ($(CONFIG_MMX),y) ifeq ($(CONFIG_SSE),y) ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE @@ -152,17 +158,7 @@ $(objcbfs)/romstage%.elf: $(objcbfs)/romstage%.debug $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h printf " ROMCC romstage.inc\n" $(ROMCC) -c -S $(ROMCCFLAGS) -D__ROMSTAGE__ -D__PRE_RAM__ -I. $(CPPFLAGS_romstage) $< -o $@ -else
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - @printf " CC romstage.inc\n" - $(CC_romstage) $(CPPFLAGS_romstage) $(CFLAGS_romstage) -MMD -D__ROMSTAGE__ -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc - @printf " POST romstage.inc\n" - sed -e 's/.rodata/.rom.data/g' -e 's/^.text/.section .rom.text/g' \ - -e 's/^.section .text/.section .rom.text/g' $^ > $@.tmp - mv $@.tmp $@ endif
romstage-srcs += $(objgenerated)/crt0.S