[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add chipset devicetree

[Duncan Laurie (Code Review)]

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44038 )

Change subject: soc/intel/tigerlake: Add chipset devicetree
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44038/4//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44038/4//COMMIT_MSG@12 
PS4, Line 12: Set a default register value as an example.
> Where is this set?

I had this initially as an example (setting SaGv to enabled) but removed it later so this line should probably go.