9 Jul
2019
9 Jul
'19
10:25 p.m.
Rajat Jain has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34175 )
Change subject: mb/google/hatch: Enable LPIT inclusion in DSDT ......................................................................
Patch Set 2:
Patch Set 2:
Does the kernel use this table? Have you tried booting it?
Yes, I believe the kernel *will* try to use it to get S0ix increment counter register address. Tim, can you please run a few S0ix suspend_Stress_test iterations with this?
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