[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add ability to disable Heci1

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32992 )

Change subject: soc/intel/cannonlake: Add ability to disable Heci1
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Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/32992/4/src/soc/intel/cannonlake/chip.h 
File src/soc/intel/cannonlake/chip.h:

https://review.coreboot.org/#/c/32992/4/src/soc/intel/cannonlake/chip.h@216 
PS4, Line 216: /* HeciEnabled decides the state of Heci1 at end of boot
             : 	 * Setting to 0 (default) disables Heci1 and hides the device from OS */
             : 	uint8_t HeciEnabled;
> I forgot about that but it seems HeciEnabled is being used at smihandler_soc_at_finalize(). […]

In my opinion we should get rid of the SMM way of disabling HECI and just use the FSP UPD.