Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62540 )
Change subject: soc/amd/stoneyridge/acpi: rename cpu.asl to pnot.asl ......................................................................
soc/amd/stoneyridge/acpi: rename cpu.asl to pnot.asl
After the patch that moved the generation of the PPKG object to Stoneyridge's acpi.c, only the PNOT object remained in its cpu.asl, so rename it to pnot.asl.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I0deb2d75cae98b8fcd31297d7fac5f27525efe65 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62540 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org --- M src/mainboard/amd/gardenia/dsdt.asl M src/mainboard/amd/padmelon/dsdt.asl M src/mainboard/google/kahlee/dsdt.asl R src/soc/amd/stoneyridge/acpi/pnot.asl 4 files changed, 6 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/src/mainboard/amd/gardenia/dsdt.asl b/src/mainboard/amd/gardenia/dsdt.asl index 6c275a0..3759384 100644 --- a/src/mainboard/amd/gardenia/dsdt.asl +++ b/src/mainboard/amd/gardenia/dsdt.asl @@ -24,8 +24,8 @@ /* PCI IRQ mapping for the Southbridge */ #include <pcie.asl>
- /* Describe the processor tree (_SB) */ - #include <cpu.asl> + /* Power state notification */ + #include <pnot.asl>
/* Contains the supported sleep states for this chipset */ #include <soc/amd/common/acpi/sleepstates.asl> diff --git a/src/mainboard/amd/padmelon/dsdt.asl b/src/mainboard/amd/padmelon/dsdt.asl index 026acf4..6104597 100644 --- a/src/mainboard/amd/padmelon/dsdt.asl +++ b/src/mainboard/amd/padmelon/dsdt.asl @@ -22,8 +22,8 @@ /* PCI IRQ mapping for the Southbridge */ #include <pcie.asl>
- /* Describe the processor tree (_SB) */ - #include <cpu.asl> + /* Power state notification */ + #include <pnot.asl>
/* Contains the supported sleep states for this chipset */ #include <soc/amd/common/acpi/sleepstates.asl> diff --git a/src/mainboard/google/kahlee/dsdt.asl b/src/mainboard/google/kahlee/dsdt.asl index 4820306..be4033b 100644 --- a/src/mainboard/google/kahlee/dsdt.asl +++ b/src/mainboard/google/kahlee/dsdt.asl @@ -24,8 +24,8 @@ /* PCI IRQ mapping for the Southbridge */ #include <pcie.asl>
- /* Describe the processor tree (_SB) */ - #include <cpu.asl> + /* Power state notification */ + #include <pnot.asl>
/* Contains the supported sleep states for this chipset */ #include <soc/amd/common/acpi/sleepstates.asl> diff --git a/src/soc/amd/stoneyridge/acpi/cpu.asl b/src/soc/amd/stoneyridge/acpi/pnot.asl similarity index 100% rename from src/soc/amd/stoneyridge/acpi/cpu.asl rename to src/soc/amd/stoneyridge/acpi/pnot.asl