Attention is currently required from: Tarun Tuli.
Ren Kuo has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69692 )
Change subject: test firmare for craaskneto ......................................................................
test firmare for craaskneto
Change-Id: I0de54b8724eb23b19c7313c01b94f7edcbb2cbe3 --- M src/mainboard/google/brya/variants/craask/overridetree.cb 1 file changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/69692/1
diff --git a/src/mainboard/google/brya/variants/craask/overridetree.cb b/src/mainboard/google/brya/variants/craask/overridetree.cb index 6db23d4..db9e363 100644 --- a/src/mainboard/google/brya/variants/craask/overridetree.cb +++ b/src/mainboard/google/brya/variants/craask/overridetree.cb @@ -444,6 +444,14 @@ end probe SD_CARD SD_GL9750S end + device ref pcie_rp9 on + # Enable NVMe SSD PCIe 9-12 using clk 1 + register "pch_pcie_rp[PCH_RP(9)]" = "{ + .clk_src = 1, + .clk_req = 1, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + end device ref pch_espi on chip ec/google/chromeec use conn0 as mux_conn[0]