Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50299 )
Change subject: soc/intel/alderlake: Increase VBT size to 9 KiB ......................................................................
soc/intel/alderlake: Increase VBT size to 9 KiB
Alderlake includes latest VBT (version 237 onwards),which has size of 8.5 KiB. This change is specific to alderlake so utilizing Kconfig option to increase VBT size specifically for ADL platforms.
BUG=None BRANCH=None TEST=Include new VBT and boot the platform. Able to see firmware screen
Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com Change-Id: I438f4bce0a2dfa208e1cd59d1cd5dd1c5ad50833 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50299 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Ronak Kanabar ronak.kanabar@intel.com --- M src/soc/intel/alderlake/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Ronak Kanabar: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index ec79855..1c69454 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -198,6 +198,10 @@ default 0xfe03e000 depends on INTEL_LPSS_UART_FOR_CONSOLE
+config VBT_DATA_SIZE_KB + int + default 9 + # Clock divider parameters for 115200 baud rate # Baudrate = (UART source clcok * M) /(N *16) # ADL UART source clock: 120MHz