[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Add GPIOs for Alder Lake SOC

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45571 )

Change subject: soc/intel/alderlake: Add GPIOs for Alder Lake SOC
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Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/45571/5/src/soc/intel/alderlake/acp... 
File src/soc/intel/alderlake/acpi/gpio.asl:

https://review.coreboot.org/c/coreboot/+/45571/5/src/soc/intel/alderlake/acp... 
PS5, Line 131:
> don't we need power management bits here as well?

can you please help to get an example, so far this is what we provide from GPIO ASL for all SoC.