Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33767 )
Change subject: soc/amd/picasso: Update UARTs
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Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33767/13/src/soc/amd/picasso/includ...
File src/soc/amd/picasso/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/33767/13/src/soc/amd/picasso/includ...
PS13, Line 31: 0xfed80000
Really? For stoney it was 0xfed80a00. Also, I saw when you defined the register accessed through this MMIO it was saying offset to 0xfed80a00. Either it was wrong there, or it's wrong here (which is what I believe).
Or are we talking something completely different, as I do see an SUPPORTS_ACPIMMIO_SMBUS_BASE below.
On Stoney, 0xfed80000 was for USB legacy registers, did it change?
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