Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45192
to look at the new patch set (#3).
Change subject: soc/intel/alderlake/romstage: Do initial SoC commit till romstage ......................................................................
soc/intel/alderlake/romstage: Do initial SoC commit till romstage
List of changes: 1. Add required SoC programming till romstage 2. Include only required headers into include/soc 3. Add SA EDS document number and chapter number 4. Fill required FSP-M UPD to call FSP-M API
Change-Id: I4473aed27363c22e92e66cc6770cb55aae83e75c Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/Makefile.inc A src/soc/intel/alderlake/chip.h A src/soc/intel/alderlake/espi.c A src/soc/intel/alderlake/include/soc/gpe.h M src/soc/intel/alderlake/include/soc/iomap.h A src/soc/intel/alderlake/include/soc/msr.h A src/soc/intel/alderlake/include/soc/pmc.h A src/soc/intel/alderlake/include/soc/romstage.h A src/soc/intel/alderlake/include/soc/soc_chip.h A src/soc/intel/alderlake/include/soc/systemagent.h A src/soc/intel/alderlake/meminit.c A src/soc/intel/alderlake/p2sb.c A src/soc/intel/alderlake/reset.c A src/soc/intel/alderlake/romstage/Makefile.inc A src/soc/intel/alderlake/romstage/fsp_params.c A src/soc/intel/alderlake/romstage/pch.c A src/soc/intel/alderlake/romstage/romstage.c A src/soc/intel/alderlake/romstage/systemagent.c 19 files changed, 1,487 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/45192/3