Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32376 )
Change subject: superio/fintek/f71808a: Add more optional ramstage registers ......................................................................
superio/fintek/f71808a: Add more optional ramstage registers
Add more registers and make them optional, so they keep untouched/ their default if omitted.
Change-Id: I5d8008176d2972976b387c558658b8e70b50af8e Signed-off-by: Max Blau tripleshiftone@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32376 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/superio/fintek/f71808a/chip.h M src/superio/fintek/f71808a/f71808a_hwm.c 2 files changed, 29 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Patrick Rudolph: Looks good to me, but someone else must approve
diff --git a/src/superio/fintek/f71808a/chip.h b/src/superio/fintek/f71808a/chip.h index f4e80ff..d838f3a 100644 --- a/src/superio/fintek/f71808a/chip.h +++ b/src/superio/fintek/f71808a/chip.h @@ -22,6 +22,13 @@
struct superio_fintek_f71808a_config {
+ uint8_t hwm_vt1_boundary_1_temperature; + uint8_t hwm_vt1_boundary_2_temperature; + uint8_t hwm_vt1_boundary_3_temperature; + uint8_t hwm_vt1_boundary_4_temperature; + uint8_t hwm_fan1_boundary_hysteresis; + uint8_t hwm_domain1_en; + /* Multi function registers */ uint8_t multi_function_register_0; uint8_t multi_function_register_1; diff --git a/src/superio/fintek/f71808a/f71808a_hwm.c b/src/superio/fintek/f71808a/f71808a_hwm.c index a370219..f5e62f9 100644 --- a/src/superio/fintek/f71808a/f71808a_hwm.c +++ b/src/superio/fintek/f71808a/f71808a_hwm.c @@ -23,6 +23,7 @@
/* Intel Ibex Peak/PECI/AMD TSI */ #define HWM_PECI_TSI_CTRL_REG 0x0a +#define HWM_DOMAIN1_EN 0x0b #define HWM_TCC_TEMPERATURE_REG 0x0c
/* Fan 1 control */ @@ -33,6 +34,12 @@ #define HWM_FAN1_SEG5_SPEED_REG 0xae #define HWM_FAN1_TEMP_SRC_REG 0xaf
+#define HWM_FAN1_BOUNDARY_HYSTERESIS 0x98 +#define HWM_VT1_BOUNDARY_1_TEMPERATURE 0xa6 +#define HWM_VT1_BOUNDARY_2_TEMPERATURE 0xa7 +#define HWM_VT1_BOUNDARY_3_TEMPERATURE 0xa8 +#define HWM_VT1_BOUNDARY_4_TEMPERATURE 0xa9 + /* Fan 2 control */ #define HWM_FAN2_SEG1_SPEED_REG 0xba #define HWM_FAN2_SEG2_SPEED_REG 0xbb @@ -55,6 +62,21 @@
pnp_enter_conf_mode(dev);
+ if (reg->hwm_vt1_boundary_1_temperature) { + pnp_write_index(port, HWM_VT1_BOUNDARY_4_TEMPERATURE, + reg->hwm_vt1_boundary_4_temperature); + pnp_write_index(port, HWM_VT1_BOUNDARY_3_TEMPERATURE, + reg->hwm_vt1_boundary_3_temperature); + pnp_write_index(port, HWM_VT1_BOUNDARY_2_TEMPERATURE, + reg->hwm_vt1_boundary_2_temperature); + pnp_write_index(port, HWM_VT1_BOUNDARY_1_TEMPERATURE, + reg->hwm_vt1_boundary_1_temperature); + pnp_write_index(port, HWM_FAN1_BOUNDARY_HYSTERESIS, + reg->hwm_fan1_boundary_hysteresis); + pnp_write_index(port, HWM_DOMAIN1_EN, + reg->hwm_domain1_en); + } + pnp_write_index(port, HWM_PECI_TSI_CTRL_REG, reg->hwm_peci_tsi_ctrl); pnp_write_index(port, HWM_TCC_TEMPERATURE_REG, reg->hwm_tcc_temp);