Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39135 )
Change subject: src/soc/tigerlake: Add memory configuration support for Jasper Lake ......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39135/2/src/soc/intel/tigerlake/inc... File src/soc/intel/tigerlake/include/soc/jsl_memcfg_init.h:
https://review.coreboot.org/c/coreboot/+/39135/2/src/soc/intel/tigerlake/inc... PS2, Line 136: jasperlake
Since this SoC folder supports two SoCs and Tigerlake is using a different way of configuring the DI […]
Even though both SoCs configure memory differently, only one of them will be enabled/used at a time i.e. either jsl_memcfg_init.c or tgl_memcfg_init.c will be enabled and not both. From that perspective we don't need to prefix SoC in the data structures and functions. Also there are discussions to split JSL and TGL SoCs separately.
https://review.coreboot.org/c/coreboot/+/39135/2/src/soc/intel/tigerlake/jsl... File src/soc/intel/tigerlake/jsl_memcfg_init.c:
https://review.coreboot.org/c/coreboot/+/39135/2/src/soc/intel/tigerlake/jsl... PS2, Line 139: NOT_EXISTING:
Yes, it is possible to have only 1 or 3 DIMMs. […]
Ok, I believe that means we don't need to pass the strap information regarding only half the memory modules are populated. It will be automatically inferred based on the number of dimm slots configured. Is that correct?