[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Use loops on DMI register groups

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Patrick Rudolph, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39631

to look at the new patch set (#2).

Change subject: nb/intel/sandybridge: Use loops on DMI register groups
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nb/intel/sandybridge: Use loops on DMI register groups

The DMI link consists of four lanes, grouped in two bundles. Therefore,
some DMI registers may be organized as "per-lane" or "per-bundle". This
can be seen in the DMI initialization sequence as series of equidistant
offsets being programmed with the same value. Make this more obvious by
factoring out the register groups using loops.

With BUILD_TIMELESS=1, the binary of ASUS P8Z77-V LX2 remains identical.

Change-Id: Iebf40b2a5b37ed9060a6660840ea6cdff7eb3fc3
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/sandybridge/early_dmi.c
1 file changed, 142 insertions(+), 137 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/39631/2