Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12466
-gerrit
commit 1dcf308e9a2f2832aaa149767b9510078f674410 Author: Stefan Reinauer stefan.reinauer@coreboot.org Date: Wed Nov 18 15:31:15 2015 -0800
intel/skylake: Fix flash_controller.c compilation
Since this code is not currently being built by coreboot, it failed compilation.
Change-Id: Ib8a0e1ebc76b7dca3dd785b09398b73abad46366 Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org --- src/soc/intel/skylake/flash_controller.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c index a68c1e9..aca22a9 100644 --- a/src/soc/intel/skylake/flash_controller.c +++ b/src/soc/intel/skylake/flash_controller.c @@ -61,18 +61,18 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms,
stopwatch_init_msecs_expire(&sw, timeout_ms);
- while (!(timeout = stopwatch_expired(&sw))) { + do { hsfs = spi_read_hsfs(regs);
if ((hsfs & (HSFS_FDONE | HSFS_FCERR))) break; - } + } while (!(timeout = stopwatch_expired(&sw)));
if (timeout) { addr = spi_read_faddr(regs); hsfc = spi_read_hsfc(regs); printk(BIOS_ERR, "%ld ms Transaction timeout between offset " - "0x%08x and 0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", + "0x%08x and 0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", stopwatch_duration_msecs(&sw), addr, addr + len - 1, addr, len - 1, hsfc, hsfs); return 1; @@ -82,7 +82,7 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms, addr = spi_read_faddr(regs); hsfc = spi_read_hsfc(regs); printk(BIOS_ERR, "Transaction error between offset 0x%08x and " - "0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", + "0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", addr, addr + len - 1, addr, len - 1, hsfc, hsfs); return 1;