[coreboot-gerrit] Change in coreboot[master]: mb/google/asurada: Pass reset gpio parameter to BL31

[Yidi Lin (Code Review)]

Hello CK HU,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/46388

to review the following change.

Change subject: mb/google/asurada: Pass reset gpio parameter to BL31
......................................................................

mb/google/asurada: Pass reset gpio parameter to BL31

To support gpio reset SoC, we need to pass the reset gpio parameter to
BL31.

Signed-off-by: CK Hu 
Change-Id: I2ae7684a61af76693605cc0bcf8d20c8992c7bff
---
M src/mainboard/google/asurada/mainboard.c
1 file changed, 18 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/46388/1

diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c
index b77b3ba..76a71c7 100644
--- a/src/mainboard/google/asurada/mainboard.c
+++ b/src/mainboard/google/asurada/mainboard.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <bl31.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/mmio.h>
@@ -7,6 +8,10 @@
 #include <soc/gpio_common.h>
 #include <soc/usb.h>

+#include "gpio.h"
+
+#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
+
 static void sdr_set_field(void *addr, u32 field, u32 val)
 {
    u32 tv = read32(addr);
@@ -16,6 +21,17 @@
    write32(addr, tv);
 }

+static void register_reset_to_bl31(void)
+{
+	static struct bl_aux_param_gpio param_reset = {
+		.h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
+		.gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH },
+	};
+
+	param_reset.gpio.index = GPIO_RESET.id;
+	register_bl31_aux_param(&param_reset.h);
+}
+
 static void mainboard_init(struct device *dev)
 {
    int i;
@@ -59,6 +75,8 @@
    sdr_set_field(gpio_base, 0x3fffffff, 0x24924924);

setup_usb_host();
+
+	register_reset_to_bl31();
 }

static void mainboard_enable(struct device *dev)