Attention is currently required from: Patrick Rudolph.
Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86270?usp=email )
Change subject: soc/amd/glinda/chipset.cb: Enable gpp_bridge_[a/b/c] by default
......................................................................
Patch Set 1:
(1 comment)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/coreboot/+/86270/comment/2c692279_04204a0d?usp... :
PS1, Line 9: TODO
Since FSP doesn't support disabling bridges and has no UPDs for that, they must be enabled in DT to […]
Thanks.
I will take that as commit-msg
--
To view, visit
https://review.coreboot.org/c/coreboot/+/86270?usp=email
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Id28a29481f9a1bc570e47a9cb75613d3621b0d44
Gerrit-Change-Number: 86270
Gerrit-PatchSet: 1
Gerrit-Owner: Maximilian Brune
maximilian.brune@9elements.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Patrick Rudolph
patrick.rudolph@9elements.com
Gerrit-Attention: Patrick Rudolph
patrick.rudolph@9elements.com
Gerrit-Comment-Date: Mon, 10 Feb 2025 21:21:18 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Patrick Rudolph
patrick.rudolph@9elements.com