Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48316 )
Change subject: soc/amd/picasso: remove config_t typedef ......................................................................
soc/amd/picasso: remove config_t typedef
Change-Id: Idc0061e7b88134ab17cb65429133cffd16ca5651 Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c 3 files changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/48316/1
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 412cc08..27f1a2a 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -221,6 +221,4 @@ enum gpp_clk_req_setting gpp_clk_config[GPP_CLK_OUTPUT_COUNT]; };
-typedef struct soc_amd_picasso_config config_t; - #endif /* __PICASSO_CHIP_H__ */ diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 9be970d..bf66759 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -90,7 +90,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *mcfg = &mupd->FspmConfig; - const config_t *config = config_of_soc(); + const struct soc_amd_picasso_config *config = config_of_soc();
mupd->FspmArchUpd.NvsBufferPtr = soc_fill_mrc_cache();
diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 72a0974..dfce835 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -195,7 +195,7 @@
static void acipgen_dptci(void) { - const config_t *config = config_of_soc(); + const struct soc_amd_picasso_config *config = config_of_soc();
if (!config->dptc_enable) return;