[coreboot-gerrit] Change in coreboot[master]: drivers/analogix: Increase the clock tolerance from 0.1% to 2%

[Hung-Te Lin (Code Review)]

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: Increase the clock tolerance from 0.1% to 2%
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drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Increase the input tolerance to avoid panel scroll.

BUG=b:173603645
BRANCH=kukui
TEST=None

Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb
Signed-off-by: Jitao Shi 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39025
Reviewed-by: Yu-Ping Wu 
Reviewed-by: Hung-Te Lin 
Tested-by: build bot (Jenkins) 
---
M src/drivers/analogix/anx7625/anx7625.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Hung-Te Lin: Looks good to me, but someone else must approve
  Yu-Ping Wu: Looks good to me, approved

diff --git a/src/drivers/analogix/anx7625/anx7625.c b/src/drivers/analogix/anx7625/anx7625.c
index 9f0b2e1..e37e047 100644
--- a/src/drivers/analogix/anx7625/anx7625.c
+++ b/src/drivers/analogix/anx7625/anx7625.c
@@ -381,7 +381,7 @@
    ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_PLL_N_NUM_7_0,
    			 (n & 0xff));
    /* diff */
-	ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x37);
+	ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x3d);

ret |= anx7625_odfc_config(bus, post_divider - 1);