Attention is currently required from: Keith Hui.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61539 )
Change subject: Documentation: Add Asus P8Z77-M ......................................................................
Patch Set 3: Code-Review+1
(4 comments)
File Documentation/mainboard/asus/p8z77-m.md:
https://review.coreboot.org/c/coreboot/+/61539/comment/9f02b9a1_e2099d11 PS3, Line 35: use kernel parameter ``iomem=relaxed`` Unloading the `lpc_ich` kernel module should also work, and it's much more convenient. `iomem=relaxed` needs a reboot and can make the system less secure.
https://review.coreboot.org/c/coreboot/+/61539/comment/a5d3245b_c569c4f8 PS3, Line 64: trailing whitespace
While at it, also add "and VBT" because Windows drivers require the VBT.
https://review.coreboot.org/c/coreboot/+/61539/comment/6a4bf903_43806d45 PS3, Line 74: - PCI POST card is not functional because the PCI bridge early init is not yet done. coreboot also needs to be configured to send POST cycles to PCI (default is LPC)
https://review.coreboot.org/c/coreboot/+/61539/comment/5aa9022a_3c2627aa PS3, Line 95: - OCZ OCZ3G1600LVAM 2x2GB kit works at DDR3-1066 instead of DDR3-1600. : : - GSkill F3-1600C9D-16GRSL 2x8GB SODIMM kit on adapter boots, but highly unstable : with obvious pattern of bit errors during memtest86+ runs. Does this still happen? Is it with native raminit or MRC?
For the GSkill modules, it would be wise to try loosening the timings a bit.