Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38621 )
Change subject: asus/p2b-*: Fold into p2b as variants thereof ......................................................................
asus/p2b-*: Fold into p2b as variants thereof
Their DSDTs are unified in the process. As a result: p2b-ls gets the S1 entry from p2b All other p2b-* boards gain a DSDT paving the way for ACPI support.
TEST=abuild
Change-Id: Ibc9bfa4fc5b582bf658215bda298523e8ee7b36b Signed-off-by: Keith Hui buurin@gmail.com --- D src/mainboard/asus/p2b-d/Kconfig D src/mainboard/asus/p2b-d/Kconfig.name D src/mainboard/asus/p2b-d/board_info.txt D src/mainboard/asus/p2b-d/romstage.c D src/mainboard/asus/p2b-ds/Kconfig D src/mainboard/asus/p2b-ds/Kconfig.name D src/mainboard/asus/p2b-ds/board_info.txt D src/mainboard/asus/p2b-ds/mptable.c D src/mainboard/asus/p2b-ds/romstage.c D src/mainboard/asus/p2b-f/Kconfig D src/mainboard/asus/p2b-f/Kconfig.name D src/mainboard/asus/p2b-f/board_info.txt D src/mainboard/asus/p2b-f/romstage.c D src/mainboard/asus/p2b-ls/Kconfig D src/mainboard/asus/p2b-ls/Kconfig.name D src/mainboard/asus/p2b-ls/acpi_tables.c D src/mainboard/asus/p2b-ls/board_info.txt D src/mainboard/asus/p2b-ls/dsdt.asl D src/mainboard/asus/p2b-ls/romstage.c M src/mainboard/asus/p2b/Kconfig M src/mainboard/asus/p2b/Kconfig.name M src/mainboard/asus/p2b/dsdt.asl R src/mainboard/asus/p2b/mptable.c R src/mainboard/asus/p2b/variants/p2b-d/devicetree.cb R src/mainboard/asus/p2b/variants/p2b-d/irq_tables.c R src/mainboard/asus/p2b/variants/p2b-ds/devicetree.cb R src/mainboard/asus/p2b/variants/p2b-ds/irq_tables.c R src/mainboard/asus/p2b/variants/p2b-f/devicetree.cb R src/mainboard/asus/p2b/variants/p2b-f/irq_tables.c R src/mainboard/asus/p2b/variants/p2b-ls/devicetree.cb R src/mainboard/asus/p2b/variants/p2b-ls/irq_tables.c 31 files changed, 145 insertions(+), 665 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/38621/1
diff --git a/src/mainboard/asus/p2b-d/Kconfig b/src/mainboard/asus/p2b-d/Kconfig deleted file mode 100644 index 8db9b7a..0000000 --- a/src/mainboard/asus/p2b-d/Kconfig +++ /dev/null @@ -1,46 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if BOARD_ASUS_P2B_D - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select CPU_INTEL_SLOT_1 - select NORTHBRIDGE_INTEL_I440BX - select SOUTHBRIDGE_INTEL_I82371EB - select SUPERIO_WINBOND_W83977TF - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select SMP - select IOAPIC - select BOARD_ROMSIZE_KB_256 - select SDRAMPWR_4DIMM - -config MAINBOARD_DIR - string - default "asus/p2b-d" - -config MAINBOARD_PART_NUMBER - string - default "P2B-D" - -config IRQ_SLOT_COUNT - int - default 6 - -config MAX_CPUS - int - default 2 - -endif # BOARD_ASUS_P2B_D diff --git a/src/mainboard/asus/p2b-d/Kconfig.name b/src/mainboard/asus/p2b-d/Kconfig.name deleted file mode 100644 index 23e7808..0000000 --- a/src/mainboard/asus/p2b-d/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_ASUS_P2B_D - bool "P2B-D" diff --git a/src/mainboard/asus/p2b-d/board_info.txt b/src/mainboard/asus/p2b-d/board_info.txt deleted file mode 100644 index fdee74e..0000000 --- a/src/mainboard/asus/p2b-d/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: desktop -Board URL: ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/ -ROM package: DIP32 -ROM protocol: Parallel -ROM socketed: y -Flashrom support: y -Release year: 1998 diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/romstage.c deleted file mode 100644 index 7fad06b..0000000 --- a/src/mainboard/asus/p2b-d/romstage.c +++ /dev/null @@ -1,18 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* Shares romstage with P2B-DS */ -#include "../p2b-ds/romstage.c" diff --git a/src/mainboard/asus/p2b-ds/Kconfig b/src/mainboard/asus/p2b-ds/Kconfig deleted file mode 100644 index 8b55174..0000000 --- a/src/mainboard/asus/p2b-ds/Kconfig +++ /dev/null @@ -1,46 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if BOARD_ASUS_P2B_DS - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select CPU_INTEL_SLOT_1 - select NORTHBRIDGE_INTEL_I440BX - select SOUTHBRIDGE_INTEL_I82371EB - select SUPERIO_WINBOND_W83977TF - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select SMP - select IOAPIC - select BOARD_ROMSIZE_KB_256 - select SDRAMPWR_4DIMM - -config MAINBOARD_DIR - string - default "asus/p2b-ds" - -config MAINBOARD_PART_NUMBER - string - default "P2B-DS" - -config IRQ_SLOT_COUNT - int - default 7 - -config MAX_CPUS - int - default 2 - -endif # BOARD_ASUS_P2B_DS diff --git a/src/mainboard/asus/p2b-ds/Kconfig.name b/src/mainboard/asus/p2b-ds/Kconfig.name deleted file mode 100644 index 0335139..0000000 --- a/src/mainboard/asus/p2b-ds/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_ASUS_P2B_DS - bool "P2B-DS" diff --git a/src/mainboard/asus/p2b-ds/board_info.txt b/src/mainboard/asus/p2b-ds/board_info.txt deleted file mode 100644 index 29a7266..0000000 --- a/src/mainboard/asus/p2b-ds/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: desktop -Board URL: ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/ -ROM package: DIP32 -ROM protocol: Parallel -ROM socketed: y -Flashrom support: y -Release year: 1998 diff --git a/src/mainboard/asus/p2b-ds/mptable.c b/src/mainboard/asus/p2b-ds/mptable.c deleted file mode 100644 index b492511..0000000 --- a/src/mainboard/asus/p2b-ds/mptable.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - int ioapic_id, ioapic_ver, isa_bus; - struct mp_config_table *mc; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - - mptable_write_buses(mc, NULL, &isa_bus); - - ioapic_id = 2; - ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); - - /* Legacy Interrupts */ - mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0); - - /* I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x18, ioapic_id, 0x13); - - /* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ - mptable_lintsrc(mc, 0x1); - - /* Compute the checksums. */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c deleted file mode 100644 index d0456e5..0000000 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <northbridge/intel/i440bx/raminit.h> -#include <superio/winbond/common/winbond.h> -#include <superio/winbond/w83977tf/w83977tf.h> - -#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) - -void mainboard_enable_serial(void) -{ - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} diff --git a/src/mainboard/asus/p2b-f/Kconfig b/src/mainboard/asus/p2b-f/Kconfig deleted file mode 100644 index efe625c..0000000 --- a/src/mainboard/asus/p2b-f/Kconfig +++ /dev/null @@ -1,38 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if BOARD_ASUS_P2B_F - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select CPU_INTEL_SLOT_1 - select NORTHBRIDGE_INTEL_I440BX - select SOUTHBRIDGE_INTEL_I82371EB - select SUPERIO_WINBOND_W83977TF - select HAVE_PIRQ_TABLE - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default "asus/p2b-f" - -config MAINBOARD_PART_NUMBER - string - default "P2B-F" - -config IRQ_SLOT_COUNT - int - default 7 - -endif # BOARD_ASUS_P2B_F diff --git a/src/mainboard/asus/p2b-f/Kconfig.name b/src/mainboard/asus/p2b-f/Kconfig.name deleted file mode 100644 index a433376..0000000 --- a/src/mainboard/asus/p2b-f/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_ASUS_P2B_F - bool "P2B-F" diff --git a/src/mainboard/asus/p2b-f/board_info.txt b/src/mainboard/asus/p2b-f/board_info.txt deleted file mode 100644 index 79b8d91..0000000 --- a/src/mainboard/asus/p2b-f/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: desktop -Board URL: ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-f/ -ROM package: DIP32 -ROM protocol: Parallel -ROM socketed: y -Flashrom support: y -Release year: 1998 diff --git a/src/mainboard/asus/p2b-f/romstage.c b/src/mainboard/asus/p2b-f/romstage.c deleted file mode 100644 index 31a100c..0000000 --- a/src/mainboard/asus/p2b-f/romstage.c +++ /dev/null @@ -1,18 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* Shares romstage with the better supported P2B-LS sibling. */ -#include "../p2b-ls/romstage.c" diff --git a/src/mainboard/asus/p2b-ls/Kconfig b/src/mainboard/asus/p2b-ls/Kconfig deleted file mode 100644 index 60124fe..0000000 --- a/src/mainboard/asus/p2b-ls/Kconfig +++ /dev/null @@ -1,40 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2010 Keith Hui buurin@gmail.com -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if BOARD_ASUS_P2B_LS - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select CPU_INTEL_SLOT_1 - select NORTHBRIDGE_INTEL_I440BX - select SOUTHBRIDGE_INTEL_I82371EB - select SUPERIO_WINBOND_W83977TF - select HAVE_PIRQ_TABLE - select BOARD_ROMSIZE_KB_256 - select SDRAMPWR_4DIMM - select HAVE_ACPI_TABLES - -config MAINBOARD_DIR - string - default "asus/p2b-ls" - -config MAINBOARD_PART_NUMBER - string - default "P2B-LS" - -config IRQ_SLOT_COUNT - int - default 8 - -endif # BOARD_ASUS_P2B_LS diff --git a/src/mainboard/asus/p2b-ls/Kconfig.name b/src/mainboard/asus/p2b-ls/Kconfig.name deleted file mode 100644 index 0ad0f47..0000000 --- a/src/mainboard/asus/p2b-ls/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_ASUS_P2B_LS - bool "P2B-LS" diff --git a/src/mainboard/asus/p2b-ls/acpi_tables.c b/src/mainboard/asus/p2b-ls/acpi_tables.c deleted file mode 100644 index d740ee1..0000000 --- a/src/mainboard/asus/p2b-ls/acpi_tables.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Tobias Diedrich ranma+coreboot@tdiedrich.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/acpi.h> - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* mainboard has no ioapic */ - return current; -} diff --git a/src/mainboard/asus/p2b-ls/board_info.txt b/src/mainboard/asus/p2b-ls/board_info.txt deleted file mode 100644 index 21bf26e..0000000 --- a/src/mainboard/asus/p2b-ls/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: desktop -Board URL: ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ls/ -ROM package: DIP32 -ROM protocol: Parallel -ROM socketed: y -Flashrom support: y -Release year: 1998 diff --git a/src/mainboard/asus/p2b-ls/dsdt.asl b/src/mainboard/asus/p2b-ls/dsdt.asl deleted file mode 100644 index b350bc9..0000000 --- a/src/mainboard/asus/p2b-ls/dsdt.asl +++ /dev/null @@ -1,272 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Keith Hui buurin@gmail.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <southbridge/intel/i82371eb/i82371eb.h> - -#define SUPERIO_PNP_BASE 0x3F0 -#define SUPERIO_SHOW_UARTA -#define SUPERIO_SHOW_UARTB -#define SUPERIO_SHOW_FDC -#define SUPERIO_SHOW_LPT - -#include <arch/acpi.h> -DefinitionBlock ("DSDT.aml", "DSDT", 2, OEM_ID, ACPI_TABLE_CREATOR, 1) -{ - /* _PR scope defining the main processor is generated in SSDT. */ - - OperationRegion(X80, SystemIO, 0x80, 1) - Field(X80, ByteAcc, NoLock, Preserve) - { - P80, 8 - } - - /* - * For now only define 2 power states: - * - S0 which is fully on - * - S5 which is soft off - * Any others would involve declaring the wake up methods. - */ - - /* - * Intel 82371EB (PIIX4E) datasheet, section 7.2.3, page 142 - * - * 0: soft off/suspend to disk S5 - * 1: suspend to ram S3 - * 2: powered on suspend, context lost S2 - * Note: 'context lost' means the CPU restarts at the reset - * vector - * 3: powered on suspend, CPU context lost S1 - * Note: Looks like 'CPU context lost' does _not_ mean the - * CPU restarts at the reset vector. Most likely only - * caches are lost, so both 0x3 and 0x4 map to ACPI S1 - * 4: powered on suspend, context maintained S1 - * 5: working (clock control) S0 - * 6: reserved - * 7: reserved - */ - Name (_S0, Package () { 0x05, 0x05, 0x00, 0x00 }) - /* - * Kept as a memo of the value needed, but blocked out until - * suspend/resume support is implemented. - */ - /*Name (_S1, Package () { 0x04, 0x07, 0x00, 0x00 })*/ - /*Name (_S4, Package () { 0x01, 0x06, 0x00, 0x00 })*/ - Name (_S5, Package () { 0x00, 0x06, 0x00, 0x00 }) - - OperationRegion (GPOB, SystemIO, DEFAULT_PMBASE+DEVCTL, 0x10) - Field (GPOB, ByteAcc, NoLock, Preserve) - { - Offset (0x03), - TO12, 1, /* Device trap 12 */ - Offset (0x08), - FANM, 1, /* GPO0, meant for fan */ - Offset (0x09), - PLED, 1, /* GPO8, meant for power LED. Per PIIX4 datasheet */ - , 3, /* this goes low when power is cut from its core. */ - , 2, - , 16, - MSG0, 1 /* GPO30, message LED */ - } - - /* Prepare To Sleep, Arg0 is target S-state */ - Method (_PTS, 1, NotSerialized) - { - /* Disable fan, blink power LED, if not turning off */ - If (LNotEqual (Arg0, 0x05)) - { - Store (Zero, FANM) - Store (Zero, PLED) - } - - /* Arms SMI for device 12 */ - Store (One, TO12) - /* Put out a POST code */ - Or (Arg0, 0xF0, P80) - } - - Method (_WAK, 1, NotSerialized) - { - /* Re-enable fan, stop power led blinking */ - Store (One, FANM) - Store (One, PLED) - /* wake OK */ - Return(Package(0x02){0x00, 0x00}) - } - - /* Root of the bus hierarchy */ - Scope (_SB) - { - Device (PWRB) - { - /* Power Button Device */ - Name (_HID, EisaId ("PNP0C0C")) - Method (_STA, 0, NotSerialized) - { - Return (0x0B) - } - } - #include <southbridge/intel/i82371eb/acpi/intx.asl> - - PCI_INTX_DEV(LNKA, _SB.PCI0.PX40.PIRA, 1) - PCI_INTX_DEV(LNKB, _SB.PCI0.PX40.PIRB, 2) - PCI_INTX_DEV(LNKC, _SB.PCI0.PX40.PIRC, 3) - PCI_INTX_DEV(LNKD, _SB.PCI0.PX40.PIRD, 4) - - /* Top PCI device */ - Device (PCI0) - { - Name (_HID, EisaId ("PNP0A03")) - Name (_UID, 0x00) - Name (_BBN, 0x00) - - /* PCI Routing Table */ - Name (_PRT, Package () { - Package (0x04) { 0x0001FFFF, 0, LNKA, 0 }, - Package (0x04) { 0x0001FFFF, 1, LNKB, 0 }, - Package (0x04) { 0x0001FFFF, 2, LNKC, 0 }, - Package (0x04) { 0x0001FFFF, 3, LNKD, 0 }, - - Package (0x04) { 0x0004FFFF, 0, LNKA, 0 }, - Package (0x04) { 0x0004FFFF, 1, LNKB, 0 }, - Package (0x04) { 0x0004FFFF, 2, LNKC, 0 }, - Package (0x04) { 0x0004FFFF, 3, LNKD, 0 }, - - Package (0x04) { 0x0006FFFF, 0, LNKD, 0 }, - Package (0x04) { 0x0006FFFF, 1, LNKA, 0 }, - Package (0x04) { 0x0006FFFF, 2, LNKB, 0 }, - Package (0x04) { 0x0006FFFF, 3, LNKC, 0 }, - - Package (0x04) { 0x0009FFFF, 0, LNKD, 0 }, - Package (0x04) { 0x0009FFFF, 1, LNKA, 0 }, - Package (0x04) { 0x0009FFFF, 2, LNKB, 0 }, - Package (0x04) { 0x0009FFFF, 3, LNKC, 0 }, - - Package (0x04) { 0x000AFFFF, 0, LNKC, 0 }, - Package (0x04) { 0x000AFFFF, 1, LNKD, 0 }, - Package (0x04) { 0x000AFFFF, 2, LNKA, 0 }, - Package (0x04) { 0x000AFFFF, 3, LNKB, 0 }, - - Package (0x04) { 0x0007FFFF, 0, LNKC, 0 }, - Package (0x04) { 0x0007FFFF, 1, LNKD, 0 }, - Package (0x04) { 0x0007FFFF, 2, LNKA, 0 }, - Package (0x04) { 0x0007FFFF, 3, LNKB, 0 }, - - Package (0x04) { 0x000BFFFF, 0, LNKB, 0 }, - Package (0x04) { 0x000BFFFF, 1, LNKC, 0 }, - Package (0x04) { 0x000BFFFF, 2, LNKD, 0 }, - Package (0x04) { 0x000BFFFF, 3, LNKA, 0 }, - - Package (0x04) { 0x000CFFFF, 0, LNKA, 0 }, - Package (0x04) { 0x000CFFFF, 1, LNKB, 0 }, - Package (0x04) { 0x000CFFFF, 2, LNKC, 0 }, - Package (0x04) { 0x000CFFFF, 3, LNKD, 0 }, - - }) - #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl> - #include <southbridge/intel/i82371eb/acpi/isabridge.asl> - - /* Begin southbridge block */ - Device (PX40) - { - Name(_ADR, 0x00040000) - OperationRegion (PIRQ, PCI_Config, 0x60, 0x04) - Field (PIRQ, ByteAcc, NoLock, Preserve) - { - PIRA, 8, - PIRB, 8, - PIRC, 8, - PIRD, 8 - } - - /* PNP Motherboard Resources */ - Device (SYSR) - { - Name (_HID, EisaId ("PNP0C02")) - Name (_UID, 0x02) - Method (_CRS, 0, NotSerialized) - { - Name (BUF1, ResourceTemplate () - { - /* PM register ports */ - IO (Decode16, 0x0000, 0x0000, 0x01, 0x40, _Y06) - /* SMBus register ports */ - IO (Decode16, 0x0000, 0x0000, 0x01, 0x10, _Y07) - /* PIIX4E ports */ - /* Aliased DMA ports */ - IO (Decode16, 0x0010, 0x0010, 0x01, 0x10, ) - /* Aliased PIC ports */ - IO (Decode16, 0x0022, 0x0022, 0x01, 0x1E, ) - /* Aliased timer ports */ - IO (Decode16, 0x0050, 0x0050, 0x01, 0x04, ) - IO (Decode16, 0x0062, 0x0062, 0x01, 0x02, ) - IO (Decode16, 0x0065, 0x0065, 0x01, 0x0B, ) - IO (Decode16, 0x0074, 0x0074, 0x01, 0x0C, ) - IO (Decode16, 0x0091, 0x0091, 0x01, 0x03, ) - IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E, ) - IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10, ) - IO (Decode16, 0x0294, 0x0294, 0x01, 0x04, ) - IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x02, ) - IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02, ) - }) - CreateWordField (BUF1, _Y06._MIN, PMLO) - CreateWordField (BUF1, _Y06._MAX, PMRL) - CreateWordField (BUF1, _Y07._MIN, SBLO) - CreateWordField (BUF1, _Y07._MAX, SBRL) - - And (_SB.PCI0.PX43.PM00, 0xFFFE, PMLO) - And (_SB.PCI0.PX43.SB00, 0xFFFE, SBLO) - Store (PMLO, PMRL) - Store (SBLO, SBRL) - Return (BUF1) - } - } - #include <southbridge/intel/i82371eb/acpi/i82371eb.asl> - } - Device (PX43) - { - Name (_ADR, 0x00040003) // _ADR: Address - OperationRegion (IPMU, PCI_Config, PMBA, 0x02) - Field (IPMU, ByteAcc, NoLock, Preserve) - { - PM00, 16 - } - - OperationRegion (ISMB, PCI_Config, SMBBA, 0x02) - Field (ISMB, ByteAcc, NoLock, Preserve) - { - SB00, 16 - } - } - - #include <superio/winbond/w83977tf/acpi/superio.asl> - } - } - - /* ACPI Message */ - Scope (_SI) - { - Method (_MSG, 1, NotSerialized) - { - If (LEqual (Arg0, Zero)) - { - Store (One, MSG0) - } - Else - { - Store (Zero, MSG0) - } - } - } -} diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c deleted file mode 100644 index b79ac82..0000000 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <northbridge/intel/i440bx/raminit.h> -#include <superio/winbond/common/winbond.h> -/* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */ -#include <superio/winbond/w83977tf/w83977tf.h> - -#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) - -void mainboard_enable_serial(void) -{ - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} diff --git a/src/mainboard/asus/p2b/Kconfig b/src/mainboard/asus/p2b/Kconfig index 65e7681..3d18bf8 100644 --- a/src/mainboard/asus/p2b/Kconfig +++ b/src/mainboard/asus/p2b/Kconfig @@ -12,7 +12,15 @@ ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## -if BOARD_ASUS_P2B + +if BOARD_ASUS_P2B || BOARD_ASUS_P2B_D || BOARD_ASUS_P2B_DS || BOARD_ASUS_P2B_F || BOARD_ASUS_P2B_LS + +config BASE_ASUS_P2B_D + def_bool n + select SDRAMPWR_4DIMM + select HAVE_MP_TABLE + select IOAPIC + select SMP
config BOARD_SPECIFIC_OPTIONS def_bool y @@ -22,18 +30,42 @@ select SUPERIO_WINBOND_W83977TF select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 - select HAVE_ACPI_TABLES + select HAVE_ACPI_TABLES if BOARD_ASUS_P2B || BOARD_ASUS_P2B_LS + select SDRAMPWR_4DIMM if BOARD_ASUS_P2B_F || BOARD_ASUS_P2B_LS + select BASE_ASUS_P2B_D if BOARD_ASUS_P2B_D || BOARD_ASUS_P2B_DS + +config MAX_CPUS + int + default 2 if BASE_ASUS_P2B_D + default 1
config MAINBOARD_DIR string default "asus/p2b"
-config MAINBOARD_PART_NUMBER +config VARIANT_DIR string - default "P2B" + default "p2b-d" if BOARD_ASUS_P2B_D + default "p2b-ds" if BOARD_ASUS_P2B_DS + default "p2b-f" if BOARD_ASUS_P2B_F + default "p2b-ls" if BOARD_ASUS_P2B_LS + +config OVERRIDE_DEVICETREE + string + default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" if ! BOARD_ASUS_P2B
config IRQ_SLOT_COUNT int - default 6 + default 8 if BOARD_ASUS_P2B_LS + default 6 if BOARD_ASUS_P2B || BOARD_ASUS_P2B_D + default 7
-endif # BOARD_ASUS_P2B +config MAINBOARD_PART_NUMBER + string + default "P2B" if BOARD_ASUS_P2B + default "P2B-D" if BOARD_ASUS_P2B_D + default "P2B-DS" if BOARD_ASUS_P2B_DS + default "P2B-F" if BOARD_ASUS_P2B_F + default "P2B-LS" if BOARD_ASUS_P2B_LS + +endif diff --git a/src/mainboard/asus/p2b/Kconfig.name b/src/mainboard/asus/p2b/Kconfig.name index 60d6028..a6cd510 100644 --- a/src/mainboard/asus/p2b/Kconfig.name +++ b/src/mainboard/asus/p2b/Kconfig.name @@ -1,2 +1,15 @@ config BOARD_ASUS_P2B bool "P2B" + +config BOARD_ASUS_P2B_D + bool "P2B-D" + +config BOARD_ASUS_P2B_DS + bool "P2B-DS" + +config BOARD_ASUS_P2B_F + bool "P2B-F" + +config BOARD_ASUS_P2B_LS + bool "P2B-LS" + diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index 3fc531a..08fb3a5b 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -46,12 +46,12 @@ * 0: soft off/suspend to disk S5 * 1: suspend to ram S3 * 2: powered on suspend, context lost S2 - * Note: 'context lost' means the CPU restarts at the reset - * vector + * Note: 'context lost' means the CPU restarts at the reset + * vector * 3: powered on suspend, CPU context lost S1 - * Note: Looks like 'CPU context lost' does _not_ mean the - * CPU restarts at the reset vector. Most likely only - * caches are lost, so both 0x3 and 0x4 map to ACPI S1 + * Note: Looks like 'CPU context lost' does _not_ mean the + * CPU restarts at the reset vector. Most likely only + * caches are lost, so both 0x3 and 0x4 map to ACPI S1 * 4: powered on suspend, context maintained S1 * 5: working (clock control) S0 * 6: reserved @@ -70,23 +70,32 @@ FANM, 1, /* GPO0, meant for fan */ Offset (0x09), PLED, 1, /* GPO8, meant for power LED. Per PIIX4 datasheet */ - , 3, /* this goes low when power is cut from its core. */ - , 2, - , 16, + , 3, /* this goes low when power is cut from its core. */ + , 2, + , 16, MSG0, 1 /* GPO30, message LED */ }
+#if CONFIG(BOARD_ASUS_P2B_D) || CONFIG(BOARD_ASUS_P2B_DS) + Name (\PICF, 0x00) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model (ACPI spec 2.0c, 5.8.1) + { + \PICF = Arg0 + } +#endif + /* Prepare To Sleep, Arg0 is target S-state */ Method (_PTS, 1, NotSerialized) { /* Disable fan, blink power LED, if not turning off */ If (LNotEqual (Arg0, 0x05)) { - Store (Zero, FANM) - Store (Zero, PLED) + Store (Zero, FANM) + Store (Zero, PLED) }
/* Arms SMI for device 12 */ + /* TODO: Factory BIOS only does this for S1 */ Store (One, TO12) /* Put out a POST code */ Or (Arg0, 0xF0, P80) @@ -128,7 +137,11 @@ Name (_BBN, 0x00)
/* PCI Routing Table */ +#if CONFIG(BOARD_ASUS_P2B_D) || CONFIG(BOARD_ASUS_P2B_DS) + Name (PICM, Package () { +#else Name (_PRT, Package () { +#endif Package (0x04) { 0x0001FFFF, 0, LNKA, 0 }, Package (0x04) { 0x0001FFFF, 1, LNKB, 0 }, Package (0x04) { 0x0001FFFF, 2, LNKC, 0 }, @@ -138,7 +151,18 @@ Package (0x04) { 0x0004FFFF, 1, LNKB, 0 }, Package (0x04) { 0x0004FFFF, 2, LNKC, 0 }, Package (0x04) { 0x0004FFFF, 3, LNKD, 0 }, - +#if CONFIG(BOARD_ASUS_P2B_LS) || CONFIG(BOARD_ASUS_P2B_DS) + Package (0x04) { 0x0006FFFF, 0, LNKD, 0 }, + Package (0x04) { 0x0006FFFF, 1, LNKA, 0 }, + Package (0x04) { 0x0006FFFF, 2, LNKB, 0 }, + Package (0x04) { 0x0006FFFF, 3, LNKC, 0 }, +#endif +#if CONFIG(BOARD_ASUS_P2B_LS) + Package (0x04) { 0x0007FFFF, 0, LNKC, 0 }, + Package (0x04) { 0x0007FFFF, 1, LNKD, 0 }, + Package (0x04) { 0x0007FFFF, 2, LNKA, 0 }, + Package (0x04) { 0x0007FFFF, 3, LNKB, 0 }, +#endif Package (0x04) { 0x0009FFFF, 0, LNKD, 0 }, Package (0x04) { 0x0009FFFF, 1, LNKA, 0 }, Package (0x04) { 0x0009FFFF, 2, LNKB, 0 }, @@ -158,8 +182,63 @@ Package (0x04) { 0x000CFFFF, 1, LNKB, 0 }, Package (0x04) { 0x000CFFFF, 2, LNKC, 0 }, Package (0x04) { 0x000CFFFF, 3, LNKD, 0 }, +#if CONFIG(BOARD_ASUS_P2B_F) + Package (0x04) { 0x000DFFFF, 0, LNKD, 0 }, + Package (0x04) { 0x000DFFFF, 1, LNKA, 0 }, + Package (0x04) { 0x000DFFFF, 2, LNKB, 0 }, + Package (0x04) { 0x000DFFFF, 3, LNKC, 0 }, +#endif
}) +#if CONFIG(BOARD_ASUS_P2B_D) || CONFIG(BOARD_ASUS_P2B_DS) + Name (APIC, Package () { + Package (0x04) { 0x000CFFFF, 0, 0, 0x10 }, + Package (0x04) { 0x000CFFFF, 1, 0, 0x11 }, + Package (0x04) { 0x000CFFFF, 2, 0, 0x12 }, + Package (0x04) { 0x000CFFFF, 3, 0, 0x13 }, + + Package (0x04) { 0x000BFFFF, 0, 0, 0x11 }, + Package (0x04) { 0x000BFFFF, 1, 0, 0x12 }, + Package (0x04) { 0x000BFFFF, 2, 0, 0x13 }, + Package (0x04) { 0x000BFFFF, 3, 0, 0x10 }, + + Package (0x04) { 0x000AFFFF, 0, 0, 0x12 }, + Package (0x04) { 0x000AFFFF, 1, 0, 0x13 }, + Package (0x04) { 0x000AFFFF, 2, 0, 0x10 }, + Package (0x04) { 0x000AFFFF, 3, 0, 0x11 }, + + Package (0x04) { 0x0009FFFF, 0, 0, 0x13 }, + Package (0x04) { 0x0009FFFF, 1, 0, 0x10 }, + Package (0x04) { 0x0009FFFF, 2, 0, 0x11 }, + Package (0x04) { 0x0009FFFF, 3, 0, 0x12 }, +#if CONFIG(BOARD_ASUS_P2B_DS) + Package (0x04) { 0x0006FFFF, 0, 0, 0x13 }, + Package (0x04) { 0x0006FFFF, 1, 0, 0x10 }, + Package (0x04) { 0x0006FFFF, 2, 0, 0x11 }, + Package (0x04) { 0x0006FFFF, 3, 0, 0x12 }, +#endif + Package (0x04) { 0x0004FFFF, 0, 0, 0x10 }, + Package (0x04) { 0x0004FFFF, 1, 0, 0x11 }, + Package (0x04) { 0x0004FFFF, 2, 0, 0x12 }, + Package (0x04) { 0x0004FFFF, 3, 0, 0x13 }, + + Package (0x04) { 0x0001FFFF, 0, 0, 0x10 }, + Package (0x04) { 0x0001FFFF, 1, 0, 0x11 }, + Package (0x04) { 0x0001FFFF, 2, 0, 0x12 }, + Package (0x04) { 0x0001FFFF, 3, 0, 0x13 } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (!\PICF) + { + Return (PICM) + } + Else + { + Return (APIC) + } + } +#endif #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl> #include <southbridge/intel/i82371eb/acpi/isabridge.asl>
@@ -226,13 +305,13 @@ OperationRegion (IPMU, PCI_Config, PMBA, 0x02) Field (IPMU, ByteAcc, NoLock, Preserve) { - PM00, 16 + PM00, 16 }
OperationRegion (ISMB, PCI_Config, SMBBA, 0x02) Field (ISMB, ByteAcc, NoLock, Preserve) { - SB00, 16 + SB00, 16 } }
diff --git a/src/mainboard/asus/p2b-d/mptable.c b/src/mainboard/asus/p2b/mptable.c similarity index 92% rename from src/mainboard/asus/p2b-d/mptable.c rename to src/mainboard/asus/p2b/mptable.c index 8f643d1..fddb218 100644 --- a/src/mainboard/asus/p2b-d/mptable.c +++ b/src/mainboard/asus/p2b/mptable.c @@ -40,6 +40,8 @@
/* I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); /* UHCI */ + if (CONFIG(BOARD_ASUS_P2B_DS)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x18, ioapic_id, 0x13);
/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ mptable_lintsrc(mc, isa_bus); diff --git a/src/mainboard/asus/p2b-d/devicetree.cb b/src/mainboard/asus/p2b/variants/p2b-d/devicetree.cb similarity index 100% rename from src/mainboard/asus/p2b-d/devicetree.cb rename to src/mainboard/asus/p2b/variants/p2b-d/devicetree.cb diff --git a/src/mainboard/asus/p2b-d/irq_tables.c b/src/mainboard/asus/p2b/variants/p2b-d/irq_tables.c similarity index 100% rename from src/mainboard/asus/p2b-d/irq_tables.c rename to src/mainboard/asus/p2b/variants/p2b-d/irq_tables.c diff --git a/src/mainboard/asus/p2b-ds/devicetree.cb b/src/mainboard/asus/p2b/variants/p2b-ds/devicetree.cb similarity index 100% rename from src/mainboard/asus/p2b-ds/devicetree.cb rename to src/mainboard/asus/p2b/variants/p2b-ds/devicetree.cb diff --git a/src/mainboard/asus/p2b-ds/irq_tables.c b/src/mainboard/asus/p2b/variants/p2b-ds/irq_tables.c similarity index 100% rename from src/mainboard/asus/p2b-ds/irq_tables.c rename to src/mainboard/asus/p2b/variants/p2b-ds/irq_tables.c diff --git a/src/mainboard/asus/p2b-f/devicetree.cb b/src/mainboard/asus/p2b/variants/p2b-f/devicetree.cb similarity index 100% rename from src/mainboard/asus/p2b-f/devicetree.cb rename to src/mainboard/asus/p2b/variants/p2b-f/devicetree.cb diff --git a/src/mainboard/asus/p2b-f/irq_tables.c b/src/mainboard/asus/p2b/variants/p2b-f/irq_tables.c similarity index 100% rename from src/mainboard/asus/p2b-f/irq_tables.c rename to src/mainboard/asus/p2b/variants/p2b-f/irq_tables.c diff --git a/src/mainboard/asus/p2b-ls/devicetree.cb b/src/mainboard/asus/p2b/variants/p2b-ls/devicetree.cb similarity index 100% rename from src/mainboard/asus/p2b-ls/devicetree.cb rename to src/mainboard/asus/p2b/variants/p2b-ls/devicetree.cb diff --git a/src/mainboard/asus/p2b-ls/irq_tables.c b/src/mainboard/asus/p2b/variants/p2b-ls/irq_tables.c similarity index 100% rename from src/mainboard/asus/p2b-ls/irq_tables.c rename to src/mainboard/asus/p2b/variants/p2b-ls/irq_tables.c