Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/22997 )
Change subject: nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeout ......................................................................
nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeout
Especially on ICH7 failing to do so results in i2c block read being unusable. On ICH10 this problem doesn't manifest itself that much.
This moves disabling the watchdog reboot to the northbridge code like i945 (even though it technically is southbridge stuff).
TESTED on Intel DG41WV: hacking on raminit is much nicer since no need to do a hard power down for +4s are needed to clear the timeouts.
Change-Id: Icfd3789312704f61000a417f23a121d02d2e7fbe Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/asrock/g41c-gs/romstage.c M src/mainboard/foxconn/g41s-k/romstage.c M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c M src/mainboard/intel/dg43gt/romstage.c M src/northbridge/intel/x4x/early_init.c M src/southbridge/intel/i82801jx/i82801jx.h 6 files changed, 8 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/22997/2