[coreboot-gerrit] [S] Change in coreboot[master]: mb/amd/mayan: Correct PCIe bridge for M.2 NVMe SSD0

[Anand Vaikar (Code Review)]

Attention is currently required from: Jason Glenesk, ritul guru, Anand Vaikar, Fred Reitberger, Felix Held.

Hello build bot (Jenkins), Jason Glenesk, ritul guru, Paul Menzel, Fred Reitberger, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/74075

to look at the new patch set (#5).

Change subject: mb/amd/mayan: Correct PCIe bridge for M.2 NVMe SSD0
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mb/amd/mayan: Correct PCIe bridge for M.2 NVMe SSD0

The M.2 NVMe SSD0 device is behind AMD PCIe bridge 0.2.4 (BDF),
hence update the correct bridge number in the device tree.

TEST: Builds and boots, the device enumerates.
[DEBUG]  PCI: 00:02.4 [1022/14ee] enabled
[DEBUG]  PCI: 01:00.0 [144d/a80a] enabled
Signed-off-by: Anand Vaikar 
Change-Id: I43096beda0405bd392574319d50e7cd6a7f8d291
---
M src/mainboard/amd/mayan/devicetree_phoenix.cb
1 file changed, 17 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/74075/5