[coreboot-gerrit] Change in coreboot[master]: mb/google/skyrim: Swap eSPI_CS_L and SOC_DISABLE_DISP_BL

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63093 )

Change subject: mb/google/skyrim: Swap eSPI_CS_L and SOC_DISABLE_DISP_BL
......................................................................

mb/google/skyrim: Swap eSPI_CS_L and SOC_DISABLE_DISP_BL

The eSPI CS function only exists on AGPIO30.

We will need to rework all boards to make eSPI function.

BUG=b:226635441
TEST=Build skyrim

Signed-off-by: Raul E Rangel 
Change-Id: Ib03c0a7dcad31d10dd4bad0d10a0184ab84aef9a
---
M src/mainboard/google/skyrim/variants/baseboard/gpio.c
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/63093/1

diff --git a/src/mainboard/google/skyrim/variants/baseboard/gpio.c b/src/mainboard/google/skyrim/variants/baseboard/gpio.c
index f095651..9eb6bd3 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/gpio.c
+++ b/src/mainboard/google/skyrim/variants/baseboard/gpio.c
@@ -60,8 +60,8 @@
    /* GPIO_28: Not available */
    /* EN_PP3300_TCHSCR */
    PAD_GPO(GPIO_29, HIGH),
-	/* SOC_DISABLE_DISP_BL */
-	PAD_GPO(GPIO_30, HIGH),
+	/* ESPI_CS_L */
+	PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
    /* Unused */
    PAD_NC(GPIO_31),
    /* LPC_RST_L */
@@ -79,8 +79,8 @@
    PAD_NF(GPIO_68, SPI1_DAT2, PULL_NONE),
    /* SPI1_DATA3 */
    PAD_NF(GPIO_69, SPI1_DAT3, PULL_NONE),
-	/* ESPI_CS_L */
-	PAD_NF(GPIO_74, SPI1_CS1_L, PULL_NONE),
+	/* SOC_DISABLE_DISP_BL */
+	PAD_GPO(GPIO_74, LOW),
    /* TCHSCR_REPORT_EN */
    PAD_GPO(GPIO_76, LOW),
    /* SPI1_CLK */