Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37131 )
Change subject: soc/intel/baytrail,braswell: Refactor .post_mp_init ......................................................................
soc/intel/baytrail,braswell: Refactor .post_mp_init
Make it consistent with rest of soc/intel.
Change-Id: I42ce0af603f93a074bd629a68223cef88cbc210b Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/baytrail/cpu.c M src/soc/intel/braswell/cpu.c 2 files changed, 12 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/37131/1
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c index d12ece0..2c59531 100644 --- a/src/soc/intel/baytrail/cpu.c +++ b/src/soc/intel/baytrail/cpu.c @@ -193,6 +193,11 @@ smm_state->smbase = staggered_smbase; }
+static void post_mp_init(void) +{ + smm_southbridge_enable_smi(); +} + static const struct mp_ops mp_ops = { .pre_mp_init = pre_mp_init, .get_cpu_count = get_cpu_count, @@ -201,7 +206,7 @@ .pre_mp_smm_init = smm_southbridge_clear_state, .per_cpu_smm_trigger = per_cpu_smm_trigger, .relocation_handler = relocation_handler, - .post_mp_init = smm_southbridge_enable_smi, + .post_mp_init = post_mp_init, };
void baytrail_init_cpus(struct device *dev) diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c index a44b9cb..33fe685 100644 --- a/src/soc/intel/braswell/cpu.c +++ b/src/soc/intel/braswell/cpu.c @@ -208,6 +208,11 @@ smm_state->smbase = staggered_smbase; }
+static void post_mp_init(void) +{ + smm_southbridge_enable_smi(); +} + static const struct mp_ops mp_ops = { .pre_mp_init = pre_mp_init, .get_cpu_count = get_cpu_count, @@ -216,7 +221,7 @@ .pre_mp_smm_init = smm_southbridge_clear_state, .per_cpu_smm_trigger = per_cpu_smm_trigger, .relocation_handler = relocation_handler, - .post_mp_init = smm_southbridge_enable_smi, + .post_mp_init = post_mp_init, };
void soc_init_cpus(struct device *dev)