[coreboot-gerrit] Change in coreboot[master]: cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable

[Nathaniel L Desimone (Code Review)]

Nathaniel L Desimone has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35165 )

Change subject: cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable
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Patch Set 3:
> Patch Set 3: Code-Review-2
>
> Please submit documentation about the feature first. Mixing stack and heap isn't the way to go

Hi Philipp,

The FSP does not mix stack and heap. For documentation on this feature, please see page 25 of the FSP v2.1 specification (https://cdrdv2.intel.com/v1/dl/getContent/611786). Here is the relevant paragraph:

StackBase - Pointer to the temporary RAM base address to be
consumed inside FspMemoryInit() API.

For FSP implementations compliant to v2.0 of this
specification, the temporary RAM is used to establish
a stack and a HOB heap. For FSP implementations
compliant to v2.1 of this specification, the temporary
RAM is only used for a HOB heap.

Starting with v2.1 of this specification, FSP will run on
top of the stack provided by the bootloader instead of
establishing a separate stack. This allows the stack
memory to be reused after FspMemoryInit() returns
to the bootloader. To retain backwards compatibility
with earlier versions of this specification, this
parameter retains the StackBase name.