[coreboot-gerrit] Change in coreboot[master]: soc/amd/common: Refactor ACPIMMIO posted writes

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42825 )

Change subject: soc/amd/common: Refactor ACPIMMIO posted writes
......................................................................

soc/amd/common: Refactor ACPIMMIO posted writes

Change-Id: Ic1a5c17c789dd79fea8f348d1a9d32d4301ced88
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42825
Reviewed-by: Felix Held 
Reviewed-by: Angel Pons 
Reviewed-by: Raul Rangel 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/common/block/include/amdblocks/acpimmio.h
M src/soc/amd/picasso/i2c.c
M src/soc/amd/stoneyridge/i2c.c
3 files changed, 6 insertions(+), 8 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved
  Raul Rangel: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 4fcaa92..15445ba 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -387,12 +387,6 @@
    write32(gpio_ctrl_ptr(gpio_num), value);
 }

-static inline void gpio_write32_rb(uint8_t gpio_num, uint32_t value)
-{
-	write32(gpio_ctrl_ptr(gpio_num), value);
-	read32(gpio_ctrl_ptr(gpio_num));
-}
-
 /* GPIO bank 0 */
 static inline uint8_t gpio0_read8(uint8_t reg)
 {
diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c
index 1eb0720..af4c41f 100644
--- a/src/soc/amd/picasso/i2c.c
+++ b/src/soc/amd/picasso/i2c.c
@@ -169,9 +169,11 @@
 static void restore_i2c_pin_registers(uint8_t gpio,
    				struct soc_amd_i2c_save *save_table)
 {
+	/* Write and flush posted writes. */
    iomux_write8(gpio, save_table->mux_value);
    iomux_read8(gpio);
-	gpio_write32_rb(gpio, save_table->control_value);
+	gpio_write32(gpio, save_table->control_value);
+	gpio_read32(gpio);
 }

/* Slaves to be reset are controlled by devicetree register i2c_scl_reset */
diff --git a/src/soc/amd/stoneyridge/i2c.c b/src/soc/amd/stoneyridge/i2c.c
index 0327028..295a833 100644
--- a/src/soc/amd/stoneyridge/i2c.c
+++ b/src/soc/amd/stoneyridge/i2c.c
@@ -144,9 +144,11 @@
 static void restore_i2c_pin_registers(uint8_t gpio,
    				struct soc_amd_i2c_save *save_table)
 {
+	/* Write and flush posted writes. */
    iomux_write8(gpio, save_table->mux_value);
    iomux_read8(gpio);
-	gpio_write32_rb(gpio, save_table->control_value);
+	gpio_write32(gpio, save_table->control_value);
+	gpio_read32(gpio);
 }

/* Slaves to be reset are controlled by devicetree register i2c_scl_reset */