Attention is currently required from: Felix Singer, Nico Huber, Michael Niewöhner, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53925 )
Change subject: soc/intel/skylake: Set proper defaults in chipset devicetree ......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/skylake/chipset.cb:
https://review.coreboot.org/c/coreboot/+/53925/comment/2602a110_b4a259d0 PS1, Line 63: n end # P2SB : device pci 1f.2 alias pmc on If P2SB is enabled in the devicetree but FSP hides the P2SB device before coreboot sees it, then coreboot will just report something about `static device not found, disabling it` and move on.
Yes I mean that hidden keyword. It does not hide things, but AFAICS it controls if a pci device that was hidden by the FSP before gets probed or not. That comment on pci_scan_hidden_device says: "This is useful when devices would like to be described in the devicetree.cb file [...] but the platform firmware hides the device (makes the device invisible to PCI enumeration) before PCI enumeration takes place." I'm unsure what exactly that means for the P2SB device, which does not have any children.
The `hidden` keyword is a kludge. It means "This PCI device exists but is not discoverable (cannot be found using the standard PCI enumeration procedure); assume it is present and otherwise behaves as a regular PCI device". It kind of tells coreboot to have faith in cursed hardware behaving properly.
we shouldn't use `device pci` in such a case.
Mhh, you mean because it's not about the device actually, but the children (bus scanned or not)?
The device is not discoverable using standard PCI enumeration; therefore, it can't be a PCI device.