Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34791 )
Change subject: soc/intel/cannonlake: Speed up postcar loading using intermediate caching ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34791/9/src/soc/intel/cannonlake/ro... File src/soc/intel/cannonlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/34791/9/src/soc/intel/cannonlake/ro... PS9, Line 167: /* Cache the ROM as WP just below 4GiB. */
CL: https://review.coreboot.org/c/coreboot/+/34995/1 […]
Yes. And cbmem -t with POSTCAR_STAGE=y for comparison.
localhost ~ # cbmem -t 58 entries total:
0:1st timestamp 12,239 5:start of verified boot 39,018 (26,779) 503:starting to initialize TPM 39,655 (637) 504:finished TPM initialization 77,398 (37,742) 505:starting to verify keyblock/preamble (RSA) 78,750 (1,352) 506:finished verifying keyblock/preamble (RSA) 93,515 (14,765) 507:starting to verify body (load+SHA2+RSA) 93,517 (2) 508:finished loading body (ignore for x86) 217,794 (124,277) 509:finished calculating body hash (SHA2) 236,697 (18,902) 510:finished verifying body signature (RSA) 239,416 (2,718) 511:starting TPM PCR extend 240,048 (632) 512:finished TPM PCR extend 255,510 (15,462) 513:starting locking TPM 255,510 (0) 514:finished locking TPM 263,825 (8,314) 6:end of verified boot 272,109 (8,284) 13:starting to load romstage 272,127 (18) 14:finished loading romstage 272,127 (0) 1:start of romstage 272,132 (5) 950:calling FspMemoryInit 275,015 (2,882) 951:returning from FspMemoryInit 300,914 (25,899) 4:end of romstage 306,208 (5,293) 100:start of postcar 307,098 (890) 101:end of postcar 307,099 (0) 8:starting to load ramstage 307,243 (144) 15:starting LZMA decompress (ignore for x86) 307,245 (2) 16:finished LZMA decompress (ignore for x86) 333,064 (25,818) 9:finished loading ramstage 333,170 (106) 550:starting to load Chrome OS VPD 333,242 (71) 10:start of ramstage 333,615 (373) 30:device enumeration 379,313 (45,697) 954:calling FspSiliconInit 387,842 (8,529) 955:returning from FspSiliconInit 473,917 (86,074) 40:device configuration 489,653 (15,736) 956:calling FspNotify(AfterPciEnumeration) 524,022 (34,368) 957:returning from FspNotify(AfterPciEnumeration) 524,332 (309) 50:device enable 524,520 (188) 60:device initialization 544,339 (19,818) 70:device setup done 577,113 (32,774) 75:cbmem post 577,617 (503) 80:write tables 577,736 (119) 15:starting LZMA decompress (ignore for x86) 580,608 (2,871) 16:finished LZMA decompress (ignore for x86) 580,870 (261) 85:finalize chips 581,500 (630) 90:load payload 595,361 (13,860) 15:starting LZMA decompress (ignore for x86) 595,649 (287) 16:finished LZMA decompress (ignore for x86) 643,568 (47,919) 958:calling FspNotify(ReadyToBoot) 644,078 (509) 959:returning from FspNotify(ReadyToBoot) 646,522 (2,443) 960:calling FspNotify(EndOfFirmware) 646,617 (95) 961:returning from FspNotify(EndOfFirmware) 647,024 (406) 99:selfboot jump 647,489 (465) 1000:depthcharge start 647,508 (19) 1002:RO vboot init 647,608 (99) 1020:vboot select&load kernel 647,611 (3) 1030:finished EC verification 667,816 (20,204) 1040:finished storage device initialization 668,909 (1,092) 1050:finished reading kernel from disk 676,022 (7,112) 1100:finished vboot kernel verification 823,294 (147,272) 1101:jumping to kernel 825,814 (2,520)
Total Time: 813,549