Marc Jones (marc.jones@se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8467
-gerrit
commit 7a0dc4bd334c40127c1871bcbf30e28f2ec3036e Author: Aaron Durbin adurbin@chromium.org Date: Tue Jun 24 14:22:36 2014 -0500
rush: Correct version field to match t132
The version field for t132 cpus is 0x00130001. Update it to the correct version.
BUG=chrome-os-partner:29882 BRANCH=None TEST=Built and was able to see serial with subsequent changes.
Original-Change-Id: I39d560307261fdfc34e071f5c35a4397c134e03c Original-Signed-off-by: Aaron Durbin adurbin@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/205435 Original-Reviewed-by: Tom Warren twarren@nvidia.com Original-Reviewed-by: Furquan Shaikh furquan@chromium.org (cherry picked from commit 14916b3ba5545ab2cb35b6a4a7fa231b895ede46) Signed-off-by: Marc Jones marc.jones@se-eng.com
Change-Id: I785069d3eb82ed24bafd52ef627d53505a35c09a --- src/mainboard/google/rush/bct/emmc.cfg | 2 +- src/mainboard/google/rush/bct/spi.cfg | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/google/rush/bct/emmc.cfg b/src/mainboard/google/rush/bct/emmc.cfg index be8f79f..430ffd6 100644 --- a/src/mainboard/google/rush/bct/emmc.cfg +++ b/src/mainboard/google/rush/bct/emmc.cfg @@ -1,7 +1,7 @@ # Copyright (c) 2013 The Chromium OS Authors. All rights reserved. # Distributed under the terms of the GNU General Public License v2
-Version = 0x00350001; +Version = 0x00130001; BlockSize = 0x00004000; PageSize = 0x00000200; PartitionSize = 0x01000000; diff --git a/src/mainboard/google/rush/bct/spi.cfg b/src/mainboard/google/rush/bct/spi.cfg index 7d05363..a5ded0b 100644 --- a/src/mainboard/google/rush/bct/spi.cfg +++ b/src/mainboard/google/rush/bct/spi.cfg @@ -1,13 +1,11 @@ # Copyright (c) 2013 The Chromium OS Authors. All rights reserved. # Distributed under the terms of the GNU General Public License v2
-Version = 0x00350001; +Version = 0x00130001; BlockSize = 32768; PageSize = 2048; PartitionSize = 4194304;
-Bctcopy = 1; - DevType[0] = NvBootDevType_Spi; DeviceParam[0].SpiFlashParams.ReadCommandTypeFast = NV_FALSE; DeviceParam[0].SpiFlashParams.ClockDivider = 0x16;