Nicolas Boichat has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32097 )
Change subject: WIP: mediaek/mt8183: add panel driver for kukui p2 ......................................................................
Patch Set 1:
(2 comments)
No great idea why this does not appear to work ,-(
Note that even the kernel driver is sometimes flaky, and at times, takes multiple attempts to switch on.
https://review.coreboot.org/#/c/32097/1/src/mainboard/google/kukui/mainboard... File src/mainboard/google/kukui/mainboard.c:
https://review.coreboot.org/#/c/32097/1/src/mainboard/google/kukui/mainboard... PS1, Line 79: gpio_output(GPIO(SIM2_SCLK), 0); Notes for self (https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/1...) LCM_RST: 45 (panel reset) BPI_BUS3: 73 (bridge reset) MISC_BSI_CK_3: 66 (ppvarp-en) PERIPHERAL_EN9: 166 (ppvarn-en) SIM2_SRST: 36 (pp1800-lcd-en) SIM2_SIO: 35 (pp3300-lcd-en) BPI_OLAT1: 54 (pp1200-mipibrdg-en) SIM2_SCLK: 37 (vddio_mipibrdg_en)
Kernel code does:
hold both reset to 0 enable all supplies
mdelay(20) release panel reset mdelay(20) release bridge reset mdelay(20)
write MIPI commands
(so what I see below looks correct)
https://review.coreboot.org/#/c/32097/1/src/soc/mediatek/mt8183/dsi.c File src/soc/mediatek/mt8183/dsi.c:
https://review.coreboot.org/#/c/32097/1/src/soc/mediatek/mt8183/dsi.c@473 PS1, Line 473: mtk_dsi_cmdq(init_cmd[i].data, init_cmd[i].len); Not sure if it matters, but the kernel code sends a nop after each command (https://chromium.googlesource.com/chromiumos/third_party/kernel/+/41efd0883b...). A short delay might do the same say, 10ms.