Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/29686 )
Change subject: mb/intel/icelake_rvp: Enable dptf functionality ......................................................................
mb/intel/icelake_rvp: Enable dptf functionality
Enable dptf functionality for IceLake based U and Y systems.
Change-Id: I8ef396f9df8e39300d5870fd9a147ecdd6f0ba90 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/29686 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb M src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb 2 files changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb index 0d2ea76..6d7fad7 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb @@ -157,6 +157,9 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
+ # Enable DPTF + register "dptf_enable" = "1" + # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5"
diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb index 62c7a82..0972c29 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb @@ -157,6 +157,9 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
+ # Enable DPTF + register "dptf_enable" = "1" + # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5"